Apparatus, system and method for control of speed of operation a

Static information storage and retrieval – Powering – Conservation of power

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365229, 713300, G11C 700

Patent

active

061512621

ABSTRACT:
This invention concerns power consumption control of memory having a fully powered state and at least one lower power state. The invention changes the memory to the fully powered state upon receipt of a memory access request. This memory access request is serviced in the fully powered state. The memory is returned to a lower power state after expiration of a grace period following a last memory access request. This grace period can be measured by a predetermined time or a predetermined number of memory access requests or a combination of these factors. The predetermined time may be fixed in manufacture or programmable in operation via a control register or data stored in a predetermined set of address locations within the address space of the memory. This invention is useful in portable electronic devices such as wireless telephones.

REFERENCES:
patent: 5686767 (1997-11-01), Helfrich et al.
patent: 5696729 (1997-12-01), Kitamura
patent: 5860016 (1999-01-01), Nookala et al.
patent: 5870613 (1999-02-01), White et al.
patent: 5889723 (1999-03-01), Pascucci

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