Computer graphics processing and selective visual display system – Computer graphic processing system – Plural graphics processors
Reexamination Certificate
2006-01-24
2009-02-17
Brier, Jeffery A. (Department: 2628)
Computer graphics processing and selective visual display system
Computer graphic processing system
Plural graphics processors
C345S531000
Reexamination Certificate
active
07492368
ABSTRACT:
A multiprocessor system executes parallel threads. A controller receives memory requests from the parallel threads and coalesces the memory requests to improve memory transfer efficiency.
REFERENCES:
patent: 3675232 (1972-07-01), Strout
patent: 5937204 (1999-08-01), Schinnerer
patent: 6002412 (1999-12-01), Schinnerer
patent: 6075544 (2000-06-01), Malachowsky et al.
patent: 6078336 (2000-06-01), Reynolds
patent: 6081873 (2000-06-01), Hetherington et al.
patent: 6122711 (2000-09-01), Mackenthun et al.
patent: 6148372 (2000-11-01), Mehrotra et al.
patent: 6150679 (2000-11-01), Reynolds
patent: 6628292 (2003-09-01), Ashburn et al.
patent: 6769047 (2004-07-01), Kurupati
patent: 7275249 (2007-09-01), Miller et al.
patent: 2004/0215944 (2004-10-01), Burky et al.
patent: 2008/0109613 (2008-05-01), Jarosh et al.
P. A. Laplante, A Novel Single Instruction Computer Architecture, Dec. 1990, ACM SIGARCH Computer Architecture News, vol. 18 , Issue 4 , pp. 22-26.
P. A. Laplante, An Improved Conditional Branching Scheme for a Single Instruction Computer Architecture, Jun. 1991, ACM SIGARCH Computer Architecture News, vol. 19 , Issue 4, pp. 66-68.
Lew Stephen D.
Nordquist Bryon S.
Brier Jeffery A.
Cooley Godward Kronish LLP
Nvidia Corporation
LandOfFree
Apparatus, system, and method for coalescing parallel memory... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Apparatus, system, and method for coalescing parallel memory..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus, system, and method for coalescing parallel memory... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4069546