Patent
1997-03-25
1999-06-29
Beausoliel, Jr., Robert W.
G06F 1125
Patent
active
059180056
ABSTRACT:
The present invention is an apparatus that maps the memory address space of the computer system into regions, and detects the incorrect execution of a load operation performed earlier than a sequentially preceding (in program order) store operation. The apparatus detects out-of-order load operations, uses a region-based mapping table to keep track of the memory regions accessed by the out-of-order load operations, detects the execution of store operations into regions accessed by out-of-order load operations, and generates a program exception when interference among reordered operations is detected. The invention is applicable to static and dynamic reordering of memory operations.
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Moreno Jaime Humberto
Moudgill Mavan
Beausoliel, Jr. Robert W.
Elisca Pierre E.
International Business Machines - Corporation
Sbrollini Jay P.
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