Apparatus having segmented memory for high-speed parallel proces

Details Apparatus having segmented memory for high-speed parallel proces Apparatus having segmented memory for high-speed parallel proces

1995-06-05

1996-11-05

Coles, Sr., Edward L.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358404, 358443, 358468, 395427, H04N 140, H04N 100, H04N 132

Patent

active

055723365

ABSTRACT:
An image data processing apparatus for dividing one page of image data into segments for high-speed image data processing. Each of the image data segments is processed by a separate compandor. The processed data is stored in an FIFO memory corresponding to each of the compandors matching the segments. The data stored in the FIFO memory is moved from there to a compressed data storage by DMA data transfer under control of a DMA data transfer controller. The DMA data transfer controller, activated beforehand by a CPU, starts transferring data upon receipt of a DMA data transfer request signal DRQ generated by a DRQ control circuit corresponding to each FIFO memory. Since the DMA data transfer controller is already operational, it executes data transfers in a very short time on receiving the DMA data transfer request signal.

REFERENCES:
patent: 4499715 (1991-03-01), Porcellio
patent: 5016165 (1991-05-01), Tanikawa et al.
patent: 5032923 (1991-07-01), Kurtin
patent: 5117486 (1992-05-01), Clark et al.
patent: 5193169 (1993-03-01), Ishikawa
patent: 5262878 (1993-11-01), Esserman
patent: 5375218 (1994-12-01), Umeda
patent: 5386532 (1995-01-01), Sodos
patent: 5436732 (1995-07-01), Mikami

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