Apparatus for writing data to and reading data from a multi-port

Details Apparatus for writing data to and reading data from a multi-port Apparatus for writing data to and reading data from a multi-port

1993-09-08

1996-08-13

Kriess, Kevin A.

Static information storage and retrieval

Magnetic bubbles

Guide structure

36518904, 364DIG1, 3642719, 3642498, G11C 700

Patent

active

055465692

ABSTRACT:
A clock generator generates repetitive master clock pulses, each master clock pulse having a leading edge and a trailing edge. The time interval between the leading edge of a first master clock pulse and the leading edge of a second master clock pulse defines a single clock cycle. A write pulse generating circuit generates write pulses for writing data into a multi-port RAM, and a read pulse generating circuit generates read pulses for reading data from the RAM. When simultaneous reading and writing of data is requested in a particular clock cycle, the leading edge of the write pulse is generated in response to the leading edge of the first master clock pulse before the leading edge of the second master clock pulse. The leading edge of the read pulse is generated after the leading edge of the write pulse, such that the data written into the memory can be read out of the memory during the same clock cycle through a different port with the only common connection being the memory cells.

REFERENCES:
patent: 4783732 (1988-11-01), Morton
patent: 4811296 (1989-03-01), Garde
patent: 5226005 (1993-06-01), Lee et al.
patent: 5276837 (1994-01-01), Sakave
patent: 5321652 (1994-06-01), Ito

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