Electric power conversion systems – Current conversion – With voltage multiplication means
Reexamination Certificate
1999-01-07
2001-01-09
Nguyen, Matthew (Department: 2838)
Electric power conversion systems
Current conversion
With voltage multiplication means
C327S536000
Reexamination Certificate
active
06172886
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an apparatus for voltage multiplication wherein the output voltage has a relatively low dependence on the supply voltage, such that comparatively simple and good regulation of the output voltage can be produced even in integrated circuits.
2. Description of the Prior Art
In order to program non-volatile memories, such as flash EEPROMs, a “high voltage” up to approximately 30 V generated by so-called voltage pumps is typically used. These voltage pumps operate on the principle of capacitive voltage multiplication and have one MOS diode and one capacitor per pump stage. Regulated voltage pumps which ensure a large constant internal rated voltage are employed in integrated circuits in which major fluctuations in the supply voltage may be allowed. These charge or voltage pumps must be designed in such a way that, even with small supply voltages such as 2.5 volts the internally required rated voltage, of 5 volts for example, is still reached. The result of this, however, is that at high supply voltages of approximately 5 or 6 volts, comparatively very high voltages of 20 or 30 volts are reached in a relatively short time, which leads to considerable regulation problems.
The publication by A. Umezawa et al., “A 5-V Only Operation 0.6 &mgr;m Flash EEPROM with Row Decoder Scheme in Triple-Well Structure”, IEEE Journal of Solid State Circuits, Vol. 27, No. 11 (1992), discloses an apparatus for voltage multiplication with high-voltage PMOS transistors and additional boost transistors. However, this apparatus is not suitable for integrated circuits in which severe fluctuations in the supply voltage may be allowed.
The European Application Document 0 350 462 discloses regulation of the output voltage of a voltage multiplier in which the clock signals originate from a ring oscillator whose frequency depends on the output voltage.
The European Application Document 0 135 889 discloses a circuit for voltage multiplication in which the substrates of the p-channel transistors are permanently connected to the supply voltage and the substrates of the n-channel transistors are permanently connected to the reference-earth potential.
A object of the present invention, therefor, is to specify an apparatus for voltage multiplication which has a low dependence of the output voltage on the pump voltage or supply voltage and which is suitable for the widest possible supply voltage range.
SUMMARY OF THE INVENTION
In an embodiment of the present invention an apparatus for voltage multiplication is provided, which includes: at least two pump transistors connected as a series circuit with connections therebetween defined as transistor connection nodes, a first pump transistor connected directly to an input voltage of the apparatus and a second pump transistor connected to an output voltage of the apparatus; a first clock signal to which gates of odd-numbered pump transistors are connected via first capacitors; a second clock signal to which gates of even-numbered pump transistors are connected via further first capacitors; a third clock signal to which odd-numbered connection nodes of the series circuit are connected via second capacitors; a fourth clock signal to which even-numbered connection nodes of the series circuit are connected via further second capacitors; a regulator connected to the voltage output of the apparatus wherein the regulator switches on and off the first through fourth clock signals; and a voltage divider which feeds a partial voltage of the output voltage to all substrate terminals of the at least two pump transistors.
In an embodiment, the apparatus further includes at least two boost transistors, wherein the gate of a respective pump transistor is connected via a respective boost transistor to the respective connection node to the preceding pump transistor, and wherein the gate of the respective boost transistor is connected to the respective connection node to the next pump transistor, and wherein all substrate terminals of the boost transistors and of the pump transistors are supplied with the partial voltage from the voltage divider.
In an embodiment, the voltage divider is formed by a series circuit of a p-channel MOS transistor and a current-limiting element, in such series circuit the partial voltage is present at a connection node between the p-channel MOS transistor and the current-limiting element which is connected to reference-earth potential, a terminal of the first MOS transistor other than the connection node being connected to the output voltage of the apparatus, and the gate terminal of the p-channel MOS transistor being connected to the supply voltage of the apparatus.
In an embodiment, the apparatus further includes two additional MOS transistors connected as diodes to form the current-limiting element.
In an embodiment, the regulator device has a proportional/derivative regulator.
REFERENCES:
patent: 5513091 (1996-04-01), Uchida et al.
patent: 5801987 (1998-09-01), Dinh
patent: 5856918 (1999-01-01), Soneda et al.
patent: 0 135 889 (1985-04-01), None
patent: 0 350 462 (1990-01-01), None
patent: 0 678 970 A2 (1995-10-01), None
A 5-V-Only Operation 0.6 um Flash EEPROM with Row Decoder Scheme in Triple-Well Structure, Umezawa et al., pp. 1540-1546, Mar. 1992.
Bloch Martin
Lauterbach Christl
Nguyen Matthew
Schiff & Hardin & Waite
Siemens Aktiengesellschaft
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