Plastic article or earthenware shaping or treating: apparatus – Distinct means to feed – support or manipulate preform stock...
Reexamination Certificate
2001-07-03
2004-08-03
Davis, Robert B. (Department: 1722)
Plastic article or earthenware shaping or treating: apparatus
Distinct means to feed, support or manipulate preform stock...
Reexamination Certificate
active
06769893
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to dispensing systems for dispensing material onto substrates and, more particularly, to a material dispensing system and method for encapsulating semiconductor chip packages under vacuum.
BACKGROUND OF THE INVENTION
Manufacturers of semiconductor chip packages use encapsulation to protect the silicon die and delicate wire bonded leads of the devices from moisture, chemical attack and mechanical stresses. With recent advances in chip packaging technology, such as in microball gate array (“&mgr;BGA”) chip packaging, the encapsulant material also serves as a compliant or resilient layer between the silicon die and the support substrate to accommodate for differences in the thermal coefficient of expansion of the die and support substrate.
In &mgr;BGA chip packaging, the silicon die is not bonded directly to the substrate as in other chip packaging schemes, but rather is supported above the substrate by compliant standoffs that create a small gap or void between the die and the support substrate. Wire bonded leads extend from the support substrate and are attached to contacts formed on the surface of the silicon die that faces the substrate. The encapsulant material is forced into the gap between the die and substrate to fill voids formed between the wire bonded leads and compliant standoffs, as well as to isolate the die surface and contacts from the outside environment. The encapsulant layer has sufficient resiliency to absorb the mechanical stresses created between the die and substrate that result from the mismatched thermal coefficients of expansion.
In the past, manufacturers of &mgr;BGA chip packages and other types of chip packages have used pressure encapsulation to create a void-free encapsulation layer between the die and substrate. In this technique, encapsulant material is dispensed onto the substrate about three peripheral edges of the die. Capillary action pulls the encapsulant material beneath the die into the gap. After some dwell time to allow the material to flow beneath the die, material is dispensed along the fourth edge of the die to create a trapped void beneath the die. The chip package is placed in a pressure oven and subjected to an increased pressure over atmosphere. The pressure differential created between the trapped void and the surrounding chamber collapses the void and forces encapsulant material to uniformly fill the gap between the die and support substrate.
Recently, vacuum encapsulation has been developed to form void-free encapsulation layers in &mgr;BGAs and other chip packages. Examples of vacuum encapsulation systems and methods may be found in U.S. Pat. Nos. 5,659,952 and 5,203,076.
In any encapsulation dispensing process, several critical issues must be addressed, including the elimination of any voids or bubbles in the dispensed encapsulant layer, as well as the speed of the encapsulation process. Currently, there is still a need to improve the speed of the encapsulation process, especially for high-volume chip scale manufacturers.
SUMMARY OF THE INVENTION
The present invention overcomes the foregoing and other shortcomings and drawbacks of chip package encapsulation systems and methods heretofore known. While the invention will be described in connection with certain embodiments, it will be understood that the invention is not limited to these embodiments. On the contrary, the invention includes all alternatives, modifications and equivalents as may be included within the spirit and scope of the present invention.
In accordance with the principles of the present invention, a multi-chamber vacuum encapsulation system is contemplated having a dispense chamber, an inlet chamber mounted adjacent an inlet end of the dispense chamber, and an outlet chamber mounted adjacent an outlet end of the dispense chamber. The inlet and outlet chambers are advantageously smaller in volume than the dispense chamber.
Movable partitions or doors are mounted between the inlet and outlet ends of the dispense chamber and the inlet and outlet chambers. When the doors are closed, a substantially air-tight seal is formed between the dispense chamber and the inlet and outlet chambers.
During the encapsulation process, the dispense chamber remains evacuated at all times while the smaller inlet and outlet chambers are evacuated and vented in a controlled manner to allow transfer of chip packages to and from the dispense chamber without venting of the dispense chamber to atmosphere.
The inlet chamber is vented to atmosphere before one or more semiconductor chip packages are moved into the inlet chamber. The inlet chamber is then evacuated before the semiconductor chip packages are transferred by a transport mechanism to the dispensing chamber through an opening formed by raising of the door between the inlet and dispense chambers. When the transfer of the semiconductor packages from the inlet chamber to the dispense chamber is complete, the door separating the inlet and outlet chambers is closed and the inlet chamber is vented to atmosphere to receive new semiconductor chip packages for encapsulation.
The dispense chamber includes a material dispenser mounted within the chamber for dispensing encapsulant about peripheral edges of a semiconductor chip package under at least partial vacuum of the dispense chamber during a dispense cycle. When the dispense cycle in the dispense chamber is complete, the semiconductor chip packages are transferred by a transport mechanism to the outlet chamber through an opening formed by raising of the door between the outlet and dispense chambers. Prior to the transfer, the outlet chamber is evacuated. When the transfer is complete, the door separating the dispense chamber from the outlet chamber is closed and the outlet chamber is vented to atmosphere at a controlled rate to force the encapsulant into the semiconductor chip package and form a substantially uniform, void-free encapsulant layer therein.
The inlet chamber serves as a pre-dispense part queuing station while the outlet chamber serves as a post-dispense dwell and vent station for the semiconductor chip packages carrying encapsulant material. In this way, the multi-chamber vacuum encapsulation system of the present invention distributes the various stages of the encapsulation process across multiple chambers to increase the speed of the encapsulation process. The smaller sizes of the inlet and outlet chambers relative to the size of the dispense chamber permits rapid evacuation and venting of the inlet and outlet chambers while allowing the dispense chamber to remain evacuated through the entire encapsulation process to further improve throughput.
The above and other objects and advantages of the present invention shall be made apparent from the accompanying drawings and the description thereof.
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Chris Lawing, Camelot Systems, Inc.,Vacuum Dispensing Of Encapsulants For uBGA Manufacturing,Electronic Packaging & Production, Feb. 1998 (pp. 87-91).
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New CSP Dispensing Systems Offer Fast, Void-Free Encapsulation,and Craig
Austin Eric
Majgier Steve
Padgett David
Springer Kyle
Davis Robert B.
Nordson Corporation
Wood Herron & Evans LLP
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