Apparatus for transforming addresses to provide pseudo-random ac

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395425, 364DIG1, 3642464, 364252, 3642544, 3642551, G06F 1206

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active

052768260

ABSTRACT:
A computer system having a multi-module memory system. Accesses to the memory modules for reading or writing are undertaken in parallel. The memory system is addressed by input addresses. The memory system includes a map unit for transforming the input addresses to output addresses in a pseudo-random manner so as to tend to distribute memory accesses uniformly among the memory modules whereby contention resulting from multiple concurrent attempts to access the same memory module is reduced. The map unit performs addresses transforms that are repeatable so that the same input address maps to the same output address and that are one-to-one such that each input address maps to one and only one output address.

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