Apparatus for transferring data divided into blocks with address

Details Apparatus for transferring data divided into blocks with address Apparatus for transferring data divided into blocks with address

1997-04-23

1998-04-14

Harvey, Jack B.

395250, 395309, G06F 1202

Patent

active

057403945

ABSTRACT:
A data transfer for high-speed data transfer between two memories comprises three buffers for temporarily storing data being transferred, a source side controller for switching the buffers and for transferring the data in terms of blocks in such a manner that the leading buffer coincides with the address boundary of the source memory, and a destination side controller for switching the buffers and for controlling the transfer of data in terms of blocks. By switching over the buffers one after another, the data transfer from the source memory to the data transfer apparatus and the data transfer from the data transfer apparatus to the destination memory can take place simultaneously.

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patent: 4415971 (1983-11-01), Guillemet et al.
patent: 5014187 (1991-05-01), Debize et al.
patent: 5166674 (1992-11-01), Baum et al.
patent: 5313607 (1994-05-01), Tokumaru

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