Apparatus for transferring data between a microprocessor and a m

Details Apparatus for transferring data between a microprocessor and a m Apparatus for transferring data between a microprocessor and a m

1986-08-06

1989-08-08

Heckler, Thomas M.

Boots, shoes, and leggings

3642584, 3642409, 3642646, G06F 1314

Patent

active

048559016

ABSTRACT:
Data are asynchronously transferred between a microprocessor and a dynamic memory under the control of a memory controller and a circuit for deriving an internal acknowledgment signal. The internal acknowledgment signal is derived in response to the memory controller deriving a signal indicating that the memory is unavailable at the time a transfer request is derived by the microprocessor or in response to a transfer request derived by the microprocessor. A mask signal is generated in response to the transfer request, a clock signal and a previously derived value for the mask signal. The mask signal has a duration to guarantee a minimum data transfer time between the memory and the microprocessor compatible with the access time T of the memory. The mask signal is combined with the internal acknowledgment signal to control the microprocessor supplying signals to the memory.

REFERENCES:
patent: 4017840 (1977-04-01), Schild et al.
patent: 4050097 (1977-09-01), Miu et al.
patent: 4149239 (1979-04-01), Jenkins et al.
patent: 4464715 (1984-08-01), Stamm
"Input/Output Control Unit Busy Disconnect Mechanism"; M. J. Mitchell, Jr.; IBM Technical Disclosure Bulletin; vol. 19, No. 8, Jan. 1977; pp. 2999-3002.
"The 68000 and its Interface", Microprocessors and Microsystems, vol. 8, No. 7, Sep. 1983, pp. 324-337, Butterworth & Co. (Pub.) Ltd.

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