Apparatus for testing signal timing and programming delay

Excavating

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Details

371 211, 327276, G01R 3128, G11C 2900

Patent

active

058417893

ABSTRACT:
A method and apparatus for testing and programming signal timing are disclosed which can be incorporated into an integrated circuit device utilizing on-chip timed command signals and pulses. The method of the invention enables nonpermanent testing and retesting of a device at various operational speeds during production testing. During retesting, temporary signal delays are selectively introduced into the circuit of a device which failed a previous test due to non-repairable errors. Once a device passes the production test error-free or with repairable errors, the temporary signal delays are permanently programmed into the device. Specifically, the method utilizes one or a plurality of mode control circuits and test voltage input terminals to nonpermanently select signal delays which may be identified and permanently enabled at a later time.

REFERENCES:
patent: 5361230 (1994-11-01), Ikeda et al.

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