Apparatus for testing integrated circuits having an...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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C324S765010, C324S073100, C714S724000

Reexamination Certificate

active

06864699

ABSTRACT:
An apparatus for testing digital and analog signals from an integrated circuit includes an adder or subtractor17for being supplied with an analog signal outputted from the integrated circuit of a device under test and a signal outputted from a driver11, an integrator14for being supplied with an analog signal outputted from the adder or subtractor17, a switch22for selectively transmitting an analog signal outputted from the integrator14and a digital signal outputted from the integrated circuit to the comparator13, and a switch24for selectively transmitting a signal outputted from a memory20and a signal outputted from a comparator13to the driver11. At least one of the switches22, 24is operated depending on whether a signal to be tested is analog or digital.

REFERENCES:
patent: 4583223 (1986-04-01), Inoue et al.
patent: 4929888 (1990-05-01), Yoshida
patent: 33 04 283 (1983-10-01), None
patent: 199 56 533 (2000-05-01), None
patent: 100 17 622 (2000-11-01), None
patent: 0 984 291 (2000-03-01), None
“Dynamic Test System for High Speed Mixed Signal Devices,” by Kiyo Hiwada and Toshio Tamamura, 1987 International Test Conference, IEEE, pp. 370-375. (translated), (no month).
Nikkei Electronic, No. 453, pp. 216-221, Aug. 8, 1988. (not translated).

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