Apparatus for testing IC chips using a sliding springy...

Electrical connectors – Including handle or distinct manipulating means – Randomly manipulated implement

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C324S754090

Reexamination Certificate

active

06325662

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to electromechanical apparatus for testing integrated circuit chips. More particularly, the present invention relates to chip testing apparatus in which a chip holding subassembly, a power converter subassembly, and a temperature regulating subassembly are squeezed together in multiple sets by respective pressing mechanisms which exert a substantially constant force despite several dimensional variations in the apparatus.
Typically, a single IC chip contains more than one-hundred-thousand transistors. Thus, a manufacturer of IC chips must test the chips to ensure that they operate properly before they are sold to a customer. This testing is usually accomplished as follows.
Initially, one group of chips that are to be tested are placed in respective sockets that are mounted on several printed circuit boards. Each printed circuit board has edge connectors on one edge of the board; and those connectors carry test signals, as well as DC electrical power, for the chips that are in the sockets.
After the chips are placed in the sockets, the printed circuit boards are inserted into fixed slots in an electromechanical apparatus where the chip testing occurs. As each printed circuit board is inserted into a slot, the edge connectors on the board plug into mating connectors that are provided in the slot.
Usually, several printed circuit boards are held in the slots, spaced-apart from each other, in a horizontal row. Alternatively, several printed circuit boards can be held in the slots, spaced-apart from each other, in a vertical column.
Multiple signal lines are provided in the chip testing apparatus which extend from the connectors in the slots to a test signal controller. This controller tests the chips by sending signals to the chips and receiving responses from them. Also, electrical power lines are provided in the chip testing apparatus which extend from the connectors in the slots to one or more power supplies.
Often it is desirable to perform a “burn-in” test on the chips wherein the chips are held at a high temperature while they are tested. In the prior art, that was done by enclosing the chip testing apparatus in an oven and providing fans in the enclosure which circulate hot air past the chips while they are tested.
However, one drawback with the above prior art chip testing apparatus is that the temperature at which the chips are tested cannot be regulated accurately. This inaccuracy is caused, in part, by variations in the temperature and velocity of the air which flows past each of the chips. Also, the inaccuracy is caused by variations in chip power dissipation which occurs while the chips are being tested, and this problem gets worse as the magnitude of the power variations increase.
One prior art mechanism which accurately regulates the temperature of IC chips in a product where the chips are permanently held, such as a computer, is described in U.S. Pat. No. 4,809,134, by Tustaniwskyj, et al, which is entitled “Low Stress Liquid Cooling Assembly”. That assembly includes a hollow jacket which carries a liquid coolant and the jacket contacts each IC chip. Thus the temperature of the chips is regulated accurately by conduction.
However, in the above '134 assembly, the jackets are held in place on the chips by a beam; and several bolts must be removed before the jackets can be lifted off the chips. To use such an assembly in a chip-testing environment would be impractical because there, the jackets need to be repeatedly taken off one set of chips and put on another set of chips.
Also, another drawback with the above prior art chip testing apparatus is that due to the row/column arrangement of the printed circuit boards, a large distance inherently exists between the chips that are tested and the power supplies for those chips. Due to those large distances, parasitic resistances, parasitic inductances and parasitic capacitances are inherently large; and thus, the more difficult it becomes to keep the chip voltages constant while chip power dissipation changes rapidly as the chips are tested.
Accordingly, a primary object of the invention is to provide an improved electromechanical apparatus for testing IC chips which avoids the above drawbacks.
BRIEF SUMMARY OF THE INVENTION
The present invention, as claimed, covers one particular portion of an electromechanical apparatus for testing integrated circuit chips wherein a chip holding subassembly, a power converter subassembly, and a temperature regulating subassembly are squeezed together in multiple sets by respective pressing mechanisms. A major benefit which is achieved with this electromechanical apparatus is that by pressing the temperature regulating subassembly against the chip holding subassembly, heat can be added/removed from the chips by conduction; and thus the temperature of the chips can be regulated accurately. Another major benefit which is achieved with this electromechanical apparatus is that by pressing the power converter subassembly against the chip holding subassembly, the distance between the chips that are tested and the power supplies for those chips is made small. Consequently, the chip voltages can easily be kept constant while the chip power dissipation changes rapidly as the chips are tested.
The particular portion of the electromechanical apparatus for testing chips which is claimed as the present invention is a sliding springy mechanism for pressing the three subassemblies together. This mechanism is comprised of a first arm that has one slidable joint, and a second arm that is coupled by a pivotal joint to the first arm. An actuator is coupled to the first arm, and the actuator slides the first arm from an open position to a closed position. In the open position, the angle between the arms is large, and in the closed position the angle between the arms is small but variable within a predetermined range. This range of angles occurs due to various manufacturing tolerances and due to a variable length stop that adjusts the force with which the temperature regulating subassembly is pressed against the chip holding subassembly.
All of the subassemblies are pressed together with a mechanical advantage by the pivotal joint between the first and second arms. But the mechanical advantage increases as the small angle between the arms decreases, and that tends the vary the force with which the subassemblies are pressed together. To counteract that effect, a spring is coupled to one of the arms which urges the arms together with a force that decreases as the mechanical advantage increases. Consequently, the force with which the subassemblies are pressed together stays relatively constant throughout the range of angles for the closed position. Pressing the subassemblies with a constant force is important because it prevents the subassemblies from being over-stressed.


REFERENCES:
patent: 2624535 (1953-01-01), Bollhoefer
patent: 6042388 (2000-03-01), Tustaniwskyj et al.
patent: 6206355 (2001-03-01), Lichtenberg

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Apparatus for testing IC chips using a sliding springy... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Apparatus for testing IC chips using a sliding springy..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus for testing IC chips using a sliding springy... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2562160

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.