Excavating
Patent
1993-10-29
1998-01-27
Beausoliel, Jr., Robert W.
Excavating
371 61, 395555, G06K 504, G11B 2700
Patent
active
057128553
ABSTRACT:
The present invention is intended to provide a testing and measuring apparatus for accurately and quickly calibrating the input and output timing of a plurality of test signal patterns and voltage levels. The invention also offers a method used for the calibration. The apparatus is equipped with a plurality of units (timing vector generators) each having a timing-generating circuit (a capture timing generator) and an external common reference timing circuit (a golden edge generator) outside the units. Each unit comprises: (1) a timing comparator circuit (a capture comparator) for comparing the timing each of the timing-generating circuits with the timing of the reference timing circuit to determine whether the former timing leads or lags the latter timing; and (2) a counter circuit which counts a number of comparisons made by the comparator circuit until their sequential relation has been reversed.
REFERENCES:
patent: 4497056 (1985-01-01), Sugamori
patent: 4928278 (1990-05-01), Otsuji et al.
patent: 5153883 (1992-10-01), Hayashi et al.
patent: 5212443 (1993-05-01), West et al.
Hewlett Packard, HP9490 Mixed Signal LSI Test System, 1991.
Goto Masaharu
Ito Ken-ichi
Beausoliel, Jr. Robert W.
Hewlett--Packard Company
Tu Trinh L.
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