Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
2000-10-12
2002-08-13
Karlsen, Ernest (Department: 2829)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S765010, C365S201000, C714S719000
Reexamination Certificate
active
06433569
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the field of testing integrated circuits. More particularly, the present invention relates to testing integrated circuits under high-temperature conditions.
BACKGROUND OF THE INVENTION
Integrated circuits are often tested after manufacture by electrically stressing the devices in an elevated temperature for a period of time to cause failure of marginal devices. This process is referred to as burn-in. Multiple integrated circuit chips are placed on a burn-in board that is similar to a computer add-on card, but usually much larger. The burn-in board is a printed circuit board with receptacles for the integrated circuit chips. The burn-in board also includes printed circuit connections between pins of the integrated circuit chips and connectors of the burn-in board.
FIG. 1
shows a prior integrated circuit testing system
100
. Oven
202
encloses multiple burn-in boards, each of which holds multiple integrated circuit (“IC”) chips. The burn-in boards (not visible in
FIG. 1
) inside oven
202
are electrically connected to respective driver/interface boards
211
a
through
211
n
,
212
a
through
212
n
, and
213
a
through
213
n
. Each driver/interface board of driver/interface boards
211
a
through
211
n
,
212
a
through
212
n
, and
213
a
through
213
n
is electrically connected in turn to computer
206
. Computer
206
controls the driver/interface boards with software that controls the testing of the integrated circuit chips.
FIG. 2
is a cutaway transparent view of oven
202
showing one row of burn-in boards
208
a
through
208
n
secured in one rack
210
within oven
202
. For example, seventy-two burn-in boards can be placed in oven
202
at one time through the use of multiple racks at various levels. Other numbers of burn-in boards are possible.
Burn-in boards
208
a
through
208
n
have respective male connectors
204
a
through
204
n
. Typically, each burn-in board of boards
208
a
through
208
n
has seventy-two electrical strip contacts that comprise the male connector. For example, connector
204
a
has seventy-two contacts, with thirty-six of the contacts on one side of connector
204
a
and thirty-six of the contacts on the opposite side of connector
204
a.
Driver/interface boards
211
a
through
211
n
have respective female connectors
205
a
through
205
n
. Typically, each driver/interface board of boards
211
a
through
211
n
has seventy-two contacts that comprise the female connector. For example, connector
205
a
has seventy-two contacts, with thirty-six of the contacts on one side of connector
205
a
and thirty-six of the contacts on the opposite side of connector
205
a.
Male connectors
204
a
through
204
n
are connected into respective female connectors
205
a
through
205
n
and provide electrical pathways between driver/interface boards
211
a
through
211
n
and burn-in boards
208
a
through
208
n
. Driver/interface boards
211
a
through
211
n
are in turn electrically connected to computer
206
. Burn-in boards
208
a
through
208
n
each include IC chips
302
a-n
through
312
a-n
, and those IC chips are accordingly electrically connected to computer
206
.
As shown in
FIG. 2
, multiple integrated circuit chips
302
a
through
302
n
are arranged in columns and rows on burn-in board
208
a
. Each of integrated circuit chips
302
a
through
302
n
receives clock, power, and ground signals. Each of integrated circuit chips
302
a
through
302
n
is powered during the entire test period. Some of the contacts of connectors
204
a
and
205
a
are used for clock, power, and ground signals. This reduces the number of contacts available to carry other signals. For example, typically eight contacts are used on connector
204
a
to carry clock, power, and ground signals, leaving sixty-four contacts available to carry other signals. The other burn-in boards
208
b
through
208
n
have similar configurations. For example, integrated circuit chips
303
a
through
303
n
reside on burn-in board
208
b
, and integrated circuit chips
312
a
through
312
n
reside on burn-in board
208
n.
For a burn-in board such as burn-in board
208
a
, the number of IC chips
302
a
through
302
n
is limited by the number of contacts of connector
204
a
and by the number of pins being used on each of the IC chips
302
a
through
302
n
under test. Different types of IC chips have different pin-outs.
For instance, an IC chip with sixteen pins and two control signals typically requires fewer signals at any one time than an IC chip with forty-eight pins and four control signals. An IC chip requiring fewer signals at any one time during the burn-in procedure requires the use of fewer contacts of connector
204
a
at any one time. It follows that burn-in board
208
a
can accommodate more of those IC chips that require few signals than those IC chips that require many signals. For a memory having a 32-bit data word and 2
15
(i.e., 32k) address locations, seventy-two of these IC chips can be accommodated on burn-in board
208
a
. Similarly, seventy-two of these IC chips can be accommodated on each of burn-in boards
208
b
through
208
n.
Driver/interface board
211
a
includes driver area
304
a
and logic area
306
a
. Driver area
304
a
contains a driver for each contact within connector
205
a
on the driver/interface board. Logic area
306
a
contains logic for receiving and processing signals sent from computer
206
to burn-in board
208
a
. Driver/interface boards
311
b
through
311
n
have similar respective driver areas
304
b
though
304
n
and logic areas
306
b
through
306
n.
Typically in prior burn-in test systems a computer program causes computer
206
to send signals to the integrated circuit chips
302
a-n
through
312
a-n
on respective burn-in boards
208
a
through
208
n
via respective driver/interface boards
211
a
through
211
n
. The signals toggle various device pins under elevated temperatures for some test period. For example, pins of the IC chips
302
a
through
302
n
are sent alternating logic one and logic zero signals—usually 5 volts alternating with zero volts. After some period, typically as long as twenty-four hours, the burn-in board
208
a
is removed from the oven. The integrated circuit chips
302
a
through
302
n
are then removed from the board
208
a
by hand and placed on an IC electrical tester (not shown) that resides outside of oven
202
. The IC electrical tester is a separate external unit designed specifically for determining the functionality of the integrated circuit chips and operates the IC chips at room temperature. If any of the integrated circuit chips
302
a
through
302
n
failed during the burn-in process, the failure is discovered typically during various tests after burn-in, and each failed IC chip is discarded. A similar procedure is used for IC chips
303
a-n
through
312
a-n
of respective burn-in boards
208
b
through
208
n.
One disadvantage of the prior burn-in test system
100
is the need for extensive testing of IC chips after burn-in to determine whether they have failed. The external testers used for this testing are very expensive, usually costing millions of dollars, and are also expensive to operate. In addition, each test which must be performed by the external testers after burn-in requires more labor and time. For these reasons, it would be very desirable to perform functional tests on IC chips while they are undergoing burn-in.
Because of limitations of prior burn-in test systems, it is not possible to perform many functional tests on IC chips while they are in the oven. For example, for IC chips that are memory devices with data words of thirty-two bits or more, the typical burn-in board and driver/interface board pin configuration of prior burn-in test systems prevents the testing of the memory devices while they are in the oven
202
. Because a limited number of pins
204
a
connect burn-in board
208
a
with the driver/interface board
211
a
, not enough pins
204
a
are available to
Eliashberg Victor M.
Prakash Kombupalayam M.
Karlsen Ernest
Pycon, Inc.
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