Pulse or digital communications – Receivers – Interference or noise reduction
Patent
1994-04-04
1995-05-16
Chin, Stephen
Pulse or digital communications
Receivers
Interference or noise reduction
455 512, H04L 700
Patent
active
054168082
ABSTRACT:
A clock synchronization system for synchronizing the performance of a number of clocks (46) so that they run parallel with a reference clock is disclosed. Each clock of this synchronization system includes a counter (52) that indicates the current time and that is sequentially incremented by a counter advance signal applied thereto. A time counter controller (54) both initializes the counter and generates the clocking signal that controls the advancement of the counter. The time counter controller further monitors the time indicated by the counter and compares it to a reference-time signal received from a reference clock. Based on the comparison, the time counter controller selectively reinitializes the counter and adjusts the rate at which the clocking signal is applied to the counter so as to ensure that the counter advances at a rate equal to the rate at which the reference clock advances. In some versions of the invention, the comparison of the reference-time signal to the actual clock counter time is made at a maintenance operation point (58) remote from the clock. In these versions of the invention, the maintenance operation point reports the difference in the two times back to the time counter controller, which, in turn, makes the appropriate adjustments to the counter and to the clocking signal.
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Benz Roger E.
Crowley-Dierks Joel R.
Glessner David W.
Witsaman Mark L.
Chin Stephen
Glenayre Electronics, Inc.
Phan Hai H.
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