Apparatus for suspending a system clock when an initial error oc

Details Apparatus for suspending a system clock when an initial error oc Apparatus for suspending a system clock when an initial error oc

1983-06-30

1986-10-07

Thomas, James D.

Boots, shoes, and leggings

371 14, G06F 1100

Patent

active

046163352

ABSTRACT:
An apparatus disposed within a computer system is disclosed for sensing the existence of an error occurring within a computer system and for suspending an internal system clock when a certain number of clock pulses are generated following the occurrence of the error. When the internal system clock is suspended, operation of the computer system stops. In the preferred embodiment, the internal system clock is suspended when two (2) clock pulses are generated following the occurrence of the error. As a result, it is not necessary to wait until execution of the current instruction is complete before stopping the operation of the computer system. Therefore, other errors are not generated within the computer system as a result of the generation of the initial error.

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"Complete Fault Detection and Fault Location for System Oscillator", by Herceg et al.; IBM Technical Disclosure Bulletin, vol. 22, No. 1, 6/79.

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