Apparatus for stacking semiconductor chips

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

257685, 257686, 257698, 257724, 361735, 361760, 361790, 361744, 174 521, 174 524, 439 83, 439 65, H01L 2334, H01L 2302, H01L 2304, H05K 700

Patent

active

RE0369160

ABSTRACT:
A multi-chip memory module comprises multiple standard, surface-mount-type memory chips stacked on top of each other, and a pair of printed circuit boards mounted on opposite sides of the memory chips to electrically interconnect the memory chips. Each printed circuit board has vias that are positioned to form multiple rows, with each row of vias used to connect the printed circuit board to a respective memory chip. The vias falling along the bottom-most row of each printed circuit board are also exposed and are used to surface mount the multi-chip module to pads of a memory board.

REFERENCES:
patent: 3246386 (1966-04-01), Ende
patent: 3290559 (1966-12-01), Kirby et al.
patent: 3313986 (1967-04-01), Kilby
patent: 3377516 (1968-04-01), Ellett et al.
patent: 3403300 (1968-09-01), Horowitz et al.
patent: 3515949 (1970-06-01), Michaels et al.
patent: 3535595 (1970-10-01), Moore
patent: 3614541 (1971-10-01), Farrand
patent: 3671812 (1972-06-01), Peluso et al.
patent: 3746934 (1973-07-01), Stein
patent: 3949274 (1976-04-01), Anacker
patent: 3959579 (1976-05-01), Johnson
patent: 4017963 (1977-04-01), Beyerlein
patent: 4116518 (1978-09-01), Pleskac
patent: 4116519 (1978-09-01), Grabbe et al.
patent: 4288808 (1981-09-01), Hantusch
patent: 4288841 (1981-09-01), Gogal
patent: 4364620 (1982-12-01), Mulholland et al.
patent: 4371912 (1983-02-01), Guzik
patent: 4379259 (1983-04-01), Varadi et al.
patent: 4394712 (1983-07-01), Anthony
patent: 4398235 (1983-08-01), Lutz et al.
patent: 4571663 (1986-02-01), McPherson
patent: 4574331 (1986-03-01), Smolley
patent: 4631573 (1986-12-01), Sutrina
patent: 4638348 (1987-01-01), Brown et al.
patent: 4638406 (1987-01-01), Samson
patent: 4642735 (1987-02-01), Hodsdon et al.
patent: 4688864 (1987-08-01), Sorel
patent: 4696525 (1987-09-01), Coller
patent: 4698663 (1987-10-01), Sugimoto et al.
patent: 4706166 (1987-11-01), Go
patent: 4761681 (1988-08-01), Reid
patent: 4770640 (1988-09-01), Walter
patent: 4821007 (1989-04-01), Fields et al.
patent: 4841355 (1989-06-01), Parks
patent: 4868712 (1989-09-01), Woodman
patent: 4884237 (1989-11-01), Mueller et al.
patent: 4924352 (1990-05-01), Septfons
patent: 4953005 (1990-08-01), Carlson et al.
patent: 4956694 (1990-09-01), Eide
patent: 4996583 (1991-02-01), Hatada
patent: 4996587 (1991-02-01), Hinrichsmeyer et al.
patent: 5016138 (1991-05-01), Woodman
patent: 5025307 (1991-06-01), Ueda et al.
patent: 5031072 (1991-07-01), Malhi et al.
patent: 5041395 (1991-08-01), Steffen
patent: 5043794 (1991-08-01), Tai et al.
patent: 5058265 (1991-10-01), Goldfarb
patent: 5086018 (1992-02-01), Conru et al.
patent: 5107328 (1992-04-01), Kinsman
patent: 5128831 (1992-07-01), Fox, III et al.
patent: 5140745 (1992-08-01), McKenzie, Jr.
patent: 5155068 (1992-10-01), Tada
patent: 5198888 (1993-03-01), Sugano et al.
patent: 5222014 (1993-06-01), Lin
patent: 5231304 (1993-07-01), Solomon
patent: 5239447 (1993-08-01), Cotues et al.
patent: 5241454 (1993-08-01), Ameen et al.
patent: 5281852 (1994-01-01), Normington
patent: 5311401 (1994-05-01), Gates, Jr. et al.
patent: 5313096 (1994-05-01), Eide
patent: 5343075 (1994-08-01), Nishino
patent: 5343366 (1994-08-01), Cipolla et al.
patent: 5369058 (1994-11-01), Burns et al.
patent: 5373189 (1994-12-01), Massit et al.
patent: 5384689 (1995-01-01), Shen
patent: 5397916 (1995-03-01), Normington
patent: 5420751 (1995-05-01), Burns
patent: 5426566 (1995-06-01), Beilstein, Jr. et al.
patent: 5446313 (1995-08-01), Masuda et al.
patent: 5479318 (1995-12-01), Burns
patent: 5481133 (1996-01-01), Hsu
patent: 5493476 (1996-02-01), Burns
patent: 5499160 (1996-03-01), Burns
patent: 5514907 (1996-05-01), Moshayedi
patent: 5552963 (1996-09-01), Burns
patent: 5561591 (1996-10-01), Burns
patent: 5566051 (1996-10-01), Burns
patent: 5586009 (1996-12-01), Burns
patent: 5605592 (1997-02-01), Burns
patent: 5612570 (1997-03-01), Eide et al.
patent: 5615475 (1997-04-01), Burns
patent: 5723903 (1998-03-01), Masuda et al.
Patent Abstract of Japan, Publication No. 05029534, Published May 2, 1993, Inventor: Nakamura Shigemi, entitled "Memory Module", European Patent Office.
"Alternative assembly for memory ICs," XP-002093051, Electronic Engineering, Jan. 1987, p. 22.
International Electronic Device Meeting, IEDM Technical Digest, Washington, D.C., Dec. 6-9, 1987.
3-D Integrated Packging and Interconnect Technology, Wescon/90 Conference Record, held Nov. 13-15, 1990, Anaheim, CA.
Tuckerman, D.B. et al., "Laminated Memory: A New 3-Dimensional Packaging Technology for MCMs" article, nCHIP, Inc., IEEE, 1994.
1992 Proceedings, 42nd Electronic Components & Technology Conference, May 18-20, 1992.
Dense-Pac Microsystems, 16-Megabit High Speed CMOS SRAM.
Dense-Pac Microsystems, 128-Megabyte SDRAM Sodimm.
Dense-Pac Microsystems, 256-Megabyte CMOS DRAM.
Dense-Pac Microsystems, "While others are still defining it . . . Our customers are cashing in!" flyer.
IBM Technical Disclosure Bulletin, Vertical Chip Packaging, vol. 20, No. 11A, Apr. 1978.
IBM Technical Disclosure Bulletin, Edge-Mounted MLC Packaging Scheme, vol. 23, No. 12, May 1981.
IBM Technical Disclosure Bulletin, Process for Producing Lateral Chip Connectors, vol. 32, No. 3B, Aug. 1989.
Research Disclosure, Organic Card Device Carrier, 31318, May 1990, No. 313.
Dense-Pac Microsystems, "3-D Technology," 1993, 15 pages.
Dense-Pac MicroSystems, Inc., "Short Form Catalog," 1991, 20 pages.
"New levels of hybrid IC density are provided by Three-Dimensional Packaging" article, 2 pages.
Dense-Pac MicroSystems, Inc., "Short Order Catalog," 1990, 12 pages.
Dense-Pac MicroSystems, Inc., "Memory Products--Short Form--Q4," 1994, 5 pages.
"Electronic Packaging & Production" article, A Cahners Publication, Jan. 1992, 2 pages.
"Introducing a Revolutionary 3 Dimensional Package Type--The SLCC," John Forthun, Advancement In Technology, Feb. 26, 1992, 12 pages.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Apparatus for stacking semiconductor chips does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Apparatus for stacking semiconductor chips, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus for stacking semiconductor chips will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-456516

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.