Electricity: electrical systems and devices – Safety and protection of systems and devices – Circuit interruption by thermal sensing
Reexamination Certificate
1999-09-20
2002-02-26
Fleming, Fritz (Department: 2836)
Electricity: electrical systems and devices
Safety and protection of systems and devices
Circuit interruption by thermal sensing
C361S093800, C361S024000, C361S100000, C361S106000, C713S300000
Reexamination Certificate
active
06351360
ABSTRACT:
FIELD OF THE INVENTION
The invention relates generally to methods and apparatus for implementing thermal shutdown of power devices of integrated circuits. More specifically, the invention relates to methods and apparatus for selectively shutting down a power device of an integrated circuit when the power device has an overcurrent (or overvoltage) condition that causes a thermal fault.
DESCRIPTION OF THE RELATED ART
Thermal shutdown circuits are frequently used with power devices to prevent damage to (or destruction of) the power devices under extreme temperature conditions, by shutting down the power devices in response to detecting a thermal fault.
The expression “thermal fault” is used herein to denote an extreme temperature condition (temperature in excess of a predetermined threshold temperature). The expression “power device” is used herein to denote electrical circuitry, or a component (e.g., transistor) of electrical circuitry, that is used to deliver power. During typical operation of a power device, substantial current flows through the device and the device can reach an undesirably high temperature (e.g., due to defects introduced into the device during manufacture, or to assertion of signals of unusual magnitude to the device during operation).
For example, in the conventional integrated circuit of
FIG. 1
, the output of circuitry
1
(produced in response to input signal IN) is coupled to a first input of OR gate
3
. The output of OR gate
3
is coupled to the gate of P-channel MOSFET transistor Pi. The drain of transistor PI is coupled to output node OUT. Thus, when the second input of gate
3
is at a logical “0”, the level of output node OUT is determined by the level of the output signal asserted from circuitry
1
to the first input of gate
3
. Circuit
2
comprises P-channel MOSFET transistor P
1
(connected as shown in
FIG. 1
) and circuitry
1
(connected as shown). Circuitry
1
typically includes (but need not include) one or more power devices, and is configured to receive input signal IN and assert in response an output signal to the first input of OR gate
3
. In a conventional implementation of thermal shutdown circuitry, the integrated circuit of
FIG. 1
includes thermal shutdown circuit
4
which asserts a voltage signal (indicative of a logical “1”) to the second input of OR gate
3
(to cause transistor P
1
to turn off) when the temperature at thermal shutdown circuit
4
increases to a threshold temperature (e.g., 170 degrees Celsius).
It is known to implement a thermal shutdown circuit (e.g., thermal shutdown circuit
4
of
FIG. 1
) using a bipolar transistor, with the voltage (V
BE
) between the base and emitter of the bipolar transistor allowed to drift in response to variations in the bipolar transistor's temperature. When the voltage V
BE
increases (or decreases) to a level that corresponds to the thermal shutdown threshold temperature, the bipolar transistor turns on, thereby generating a signal which is asserted by the thermal shutdown circuit to cause power devices on the chip to shut down.
When an integrated circuit includes two or more power devices but only one thermal shutdown circuit, the thermal shutdown circuit cannot reliably determine which (if any) of the power devices is generating excessive heat (due to thermal crosstalk), and thus cannot independently shut down individual ones of the power devices that are generating excessive heat while allowing the others to continue to operate.
Even when an integrated circuit includes multiple power devices, and multiple thermal shutdown circuits (each thermal shutdown circuit positioned on the chip close to a different one of the power devices), thermal crosstalk typically prevents the thermal shutdown circuits from reliably determining which (if any) of the power devices is generating excessive heat. Thus, the thermal shutdown circuits cannot independently shut down an individual one of the power devices that is generating excessive heat (or individual ones of the power devices that are generating excessive heat) while allowing the others to continue to operate. For example, a thermal fault of prolonged duration (due to excessive heat generation at one of several power devices on a chip) will heat the entire die, causing all the thermal shutdown circuits to detect a thermal fault, with the result that the thermal shutdown circuits will shut down all the power devices.
It is well known to include an overcurrent (and/or overvoltage) shutdown circuit in an integrated circuit that includes a power device, to prevent destruction of the power device by shutting it down (or limiting the current through it) in response to detecting one or both of an overcurrent condition (in which the power device draws current in excess of a current threshold) and an overvoltage condition (in which a node of the power device reaches a potential above a threshold value).
However, until the present invention it had not been known how to implement an integrated circuit (including one or more power devices) with circuitry configured to reliably (and independently) shut down (or limit the current through) each individual power device having an overcurrent (and/or overvoltage) condition that causes a thermal fault (resulting in temperature above a threshold temperature). Nor had it been known how to implement such an integrated circuit so as to be capable of reliably shutting down all the power devices in appropriate cases of thermal fault (e.g., where there is a more extreme thermal fault), even when no overcurrent or overvoltage condition is detected.
SUMMARY OF THE INVENTION
In preferred embodiments, the invention is an integrated circuit (including one or more power devices) and circuitry which reliably (and independently) shuts down each power device that is detected to be in an undesired operating condition (e.g., one or both of an overcurrent condition and an overvoltage condition) that causes a thermal fault (resulting in temperature above a threshold temperature T1), but which does not shut down any power device that is not in such an overcurrent or overvoltage condition. Typically, the integrated circuit of the invention includes multiple power devices (two or more power devices) and an overcurrent (or overvoltage) detection circuit for each power device. In typical implementations with multiple power devices and an overcurrent (or overvoltage) detection circuit for each power device, the integrated circuit preferably includes a thermal fault detection circuit and logic circuitry which receives the output of the thermal fault detection circuit and each overcurrent (overvoltage) detection circuit. The logic circuitry generates the control signals which shut down appropriate ones of the power devices in response to the detection circuit output signals it receives.
In preferred embodiments, the integrated circuit of the invention also includes fail safe thermal shutdown circuitry which shuts down all the power devices upon detecting a more severe thermal fault (resulting in temperature above a higher threshold temperature T2, where T2 is greater than T1) even when no overcurrent or overvoltage condition is detected. It is important to include such fail safe thermal shutdown circuitry to prevent damage to power devices (which would otherwise result from operation at excessively high temperature), even where the detected thermal fault is caused other than by an overcurrent or overvoltage condition of any power device on the chip (e.g., when it is caused by a fault external to the chip), or where the thermal fault is caused by a soft short (or other undesired condition) associated with a power device on the chip (where the soft short or other condition produces excessive heat but is not detectable as an overcurrent or overvoltage condition).
Another aspect of the invention is a method for implementing thermal shutdown of selected power devices of an integrated circuit. In a class of embodiments, the temperature of the circuit is monitored while the presence or absence of an overcurrent and/or overvo
Kotowski Jeff
Parry John P.
Schmoock James C.
Fleming Fritz
Girard & Equitz LLP
National Semiconductor Corporation
Quinones Miguel A.
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