Apparatus for selecting a user programmable address for an I/O d

Details Apparatus for selecting a user programmable address for an I/O d Apparatus for selecting a user programmable address for an I/O d

1996-03-15

1998-05-05

Shin, Christopher B.

395823, 395401, G06F 1300

Patent

active

057489823

ABSTRACT:
Manual insertion of hardware jumpers to configure I/O device selection and addressing is eliminated through the implementation of specialized hardware which allows for program control over several addressing paths. A register file is utilized within a programmable device to configure demultiplexers and multiplexers which map I/O address control line signals to set up various communication paths for address I/O exchanges. I/O configuration is entirely removed from add-on cards through the use of the programmable device. Accordingly, such add-on cards only require minimum circuitry, thus facilitating the use of miniature or baby cards as option cards which are much smaller than standard add-on cards.

REFERENCES:
patent: 3801964 (1974-04-01), Palfi et al.
patent: 4623888 (1986-11-01), Waring
patent: 5072450 (1991-12-01), Helm et al.
patent: 5097445 (1992-03-01), Yamauchi
patent: 5233561 (1993-08-01), Mori et al.
patent: 5428808 (1995-06-01), Sawase et al.
patent: 5434979 (1995-07-01), Warner
patent: 5459453 (1995-10-01), Minerd et al.
patent: 5574866 (1996-11-01), Smith et al.

Affiliated with

Also associated with

Rating

Apparatus for selecting a user programmable address for an I/O d does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Apparatus for selecting a user programmable address for an I/O d, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus for selecting a user programmable address for an I/O d will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-70720