Pulse or digital communications – Receivers – Angle modulation
Reexamination Certificate
1999-06-21
2003-06-17
Chin, Stephen (Department: 2634)
Pulse or digital communications
Receivers
Angle modulation
Reexamination Certificate
active
06580765
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates in general to a symbol timing recovery apparatus, and more particularly to an apparatus for recovering symbol timing in a carrierless AM/PM (CAP)-based high-speed communication system such as an asymmetric digital subscriber line (ADSL) or very high-rate digital subscriber line (VDSL), using a single-sided prefilter pair, in which timing information is obtained by means of the single-sided prefilter pair and a multiplier instead of a squaring unit used in general communication systems, for the recovery of accurate data, so that the symbol timing can be recovered through a digital signal process at a clock rate which is four times as high as a symbol transmission rate.
2. Description of the Prior Art
Generally, in the case where an unshielded twisted-pair (UTP), which is a typical telephone line, is used as a transmission line for a high-speed communication system, a signal may be transmitted therethrough while being subjected to a great distortion resulting from a channel characteristic and high-speed data transmission. For the recovery of accurate data from such a signal, it is very important to first recover accurate symbol timing therefrom.
Further, according to the recent trend where it is of greater interest to integrate various function blocks into one integrated circuit (IC) to reduce the size and production cost of the entire system, it is required that a symbol timing recovery block be integrated with a data recovery block such as a channel equalizer, which is typically implemented in a digital manner, into one IC. In this connection, it is preferred that the symbol timing recovery block is implemented in a digital manner similarly to the data recovery block.
On the other hand, a carrierless AM/PM (CAP) method is to place data on in-phase and quadrature-phase of a signal by varying an amplitude of the signal. The CAP method is analogous to a quadrature amplitude modulation (QAM) method, but it is different from the QAM method in taking a center frequency of the signal for mixing of the in-phase and quadrature-phase, not as an integer multiple of a symbol frequency, but as a real number multiple of the symbol frequency such as, for example, 0.8 times. The CAP method is further characterized by the use of only a pulse shaping filter. For example, a 16-CAP method is one of various methods used in a high-speed digital subscriber line (DSL) which is now of more interest.
In a conventional low-speed DSL or other communication systems employing the QAM method analogous to the CAP method, a squaring unit is used to obtain symbol timing information. The squaring unit squares a signal in digital implementation, resulting in the signal being spread in frequency band. For this reason, in sampling the signal, there is required a clock with a frequency which is higher than four times the symbol frequency.
Accordingly, when such a conventional symbol timing recovery method is applied to a high-speed communication system, it requires a sampling frequency in a frequency band difficult to handle in the digital implementation. In other words, the conventional symbol timing recovery method is not suitable for the high-speed communication system.
On the other hand, shown in Korean Patent Application No. 96-15472 is a timing recovery apparatus for a data transmission/reception system which comprises an analog/digital converter for converting an input analog signal into a digital signal, a prefilter for prefiltering an output signal from the analog/digital converter to output only a component for the extraction of a symbol frequency, a phase comparator for generating a phase difference signal in response to an output signal from the prefilter, and a normalizer for normalizing the phase difference signal from the phase comparator and applying the normalized result as a sampling clock control signal to the analog/digital converter.
However, the above-mentioned conventional timing recovery apparatus is disadvantageous in that it cannot recover accurate symbol timing in the case where a transmitted signal was modulated by the CAP method.
As a result, there has been required a technique which is suitable for a high-speed communication system employing the CAP method and capable of recovering symbol timing using a clock with a frequency which is four times as high as a symbol frequency, so that it can be integrated with a data recovery block.
SUMMARY OF THE INVENTION
Therefore, the present invention has been made in view of the above problem, and it is an object of the present invention to provide an apparatus for recovering symbol timing in a CAP-based high-speed communication system using a single-sided prefilter pair, which is capable of being integrated with a data recovery block in a data recovery process and accurately recovering the symbol timing using a clock with a frequency which is four times as high as a symbol frequency.
In accordance with the present invention, the above and other objects can be accomplished by a provision of an apparatus for recovering symbol timing in a CAP-based highspeed communication system using a single-sided prefilter pair, comprising an analog/digital converter for converting a transmitted signal into a digital signal in response to a sampling clock; the single-sided prefilter pair including a low pass prefilter for low pass prefiltering an output signal from the analog/digital converter to provide symbol timing information at a lower frequency band, and a high pass prefilter for high pass prefiltering the output signal from the analog/digital converter to provide symbol timing information at a higher frequency band; a multiplier for multiplying output signals from the low pass prefilter and high pass prefilter by each other; a band pass filter for band pass filtering an output signal from the multiplier to extract accurate frequency information therefrom; a phase detector for detecting a symbol timing phase from an output signal from the band pass filter; a loop filter for normally maintaining a closed loop; and a voltage controlled oscillator for generating the sampling clock in response to a signal which is transferred from the phase detector through the loop filter.
The single-sided prefilter pair and multiplier are used instead of a squaring unit to prevent a frequency band from being spread. Therefore, the timing can be obtained with no signal overlapping due to sampling although a sampling frequency is four times as high as a symbol frequency. Further, a timing jitter can be reduced which may occur on a specific pattern of data.
REFERENCES:
patent: 5963594 (1999-10-01), Farrow
patent: 6249557 (2001-06-01), Takatori et al.
patent: 6307896 (2001-10-01), Gumm et al.
IEEE Transactions on Communications, vol. Com-34, No. 11, Nov. 1986, by Aldo N. D'Andrea et al.
IEEE Transactions on Communications, vol. 36, No. 5, May 1988, by Martin Oerder et al.
IEEE Journal on Selected Areas in Communications, vol. 13, No. 4, May 1995, by G.-H. Im et al.
Kim Beomsup
Kim Key Hyun
Song Yong Chul
Bachman & LaPointe P.C.
Chin Stephen
Korea Advanced Institute of Science and Technology
Odom Curtis
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