Apparatus for receiving high-speed data in packet form

Multiplex communications – Wide area network – Packet switching

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Details

370 94, 377 39, 375102, H04J 302, H04B 110

Patent

active

047714212

ABSTRACT:
Apparatus for asynchronous reception of high-speed data in packet form in a receiver in a telecommunication system where transmitter and receiver are in communication in selected time slots over a common bus. The apparatus includes a delay line (7) receiving the incoming signal and having a plurality of taps, each of which feeds the signal to its own shift register. A locking circuit (10) is furthermore arranged, which stops the stepping forward in the shift register when the first "one" therein has come to a given position, and counting means (12) which senses this given position in each shift register and sums the sensed "ones". A comparison circuit (14) compares the obtained sum with a value constituting the criterion for the number of sensed "ones" representing a received "one".

REFERENCES:
patent: 3783250 (1974-01-01), Fletcher et al.
patent: 4088833 (1978-05-01), Godard et al.
patent: 4225961 (1980-09-01), Raggenbass et al.

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