Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
Patent
1996-06-28
1998-08-11
Wallace, Valencia Martin
Active solid-state devices (e.g., transistors, solid-state diode
Gate arrays
With particular signal path connections
257202, 257204, 257206, 257207, 257355, 257360, H01L 2710, H01L 2362
Patent
active
057930694
ABSTRACT:
In a gate array having a plurality of free transistors and target transistors, a method and apparatus for protecting a gate electrode of a target transistor from gate charge by employing a free transistor as a gate electrode protection device. A target transistor is a transistor that has been determined to need gate charging protection. A free transistor is a transistor in the gate array which is not used to implement the logic design as embodied in the gate array. Initially, a base array is formed without any metal layers. Then, a determination is made as to which transistors require gate charging protection. The gate electrode of each target transistor determined to require gate charging is coupled to an associated drain or source electrode of a free transistor of the gate array. The gate electrode of the free transistor is connected to an appropriate voltage reference to turn the free transistor off.
REFERENCES:
patent: 4687954 (1987-08-01), Yasuda et al.
patent: 5581103 (1996-12-01), Mizukami
Butler Edward
Schuelein Mark Edward
Intel Corporation
Martin Wallace Valencia
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