Apparatus for programming the speed at which an expansion card g

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Details

364DIG1, 3642391, 364240, 3642401, 3642711, 3642715, 3642716, 395310, 395822, 395878, G06F 1300

Patent

active

054653339

ABSTRACT:
An apparatus is disclosed for processing information including a bus, a controller circuit, the controller circuit being configured to control transfer of information over the bus, and a slave circuit. The slave circuit includes a slave timing circuit which variably generates a ready signal indicating when the slave can accept data to allow the slave circuit to function in computer systems having different bus speeds. The controller circuit and the slave circuit exchange information via the bus at a speed controlled by the ready signal.

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