Apparatus for producing a multi-scene video signal

Television – Basic receiver with additional function – For display of additional information

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348564, H04N 545

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active

054346240

ABSTRACT:
A multi-scene video signal producing apparatus in which a single large capacity memory is used for simultaneously displaying a plurality of scenes on respective regions formed by splitting one frame without requiring a plurality of memories for individual video signals so that the apparatus can be constituted by a small number of required component parts. The apparatus includes, in a stage preceding the memory into which a plurality of digital video input signals are written, data delay parts delaying the video input signals, data position detectors generating data position pulses together with address signals, address delay parts delaying the address signals, a memory synchronization pulse generator generating memory synchronization pulses, position detection/holders detecting and holding the data positions on the basis of the data position pulses and the memory synchronization pulses, decoders decoding the output signals of the position detection/holders, and selectors selecting the delayed video signals and the delayed address signals according to signal decoded information from the decoders, so that the plural video input signals can be written in the single memory.

REFERENCES:
patent: 5016106 (1991-05-01), Yong-Je et al.
patent: 5040067 (1991-08-01), Yamazaki
patent: 5130801 (1992-07-01), Yamaguchi
patent: 5161012 (1992-11-01), Choi
M. Burkert, et al, "IC Set for a Picture-In-Picture System with On-Chip Memory", IEEE Transactions on Consumer Electronics, vol. 36, No. 1, Feb. 1990, pp. 23-31.

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