Apparatus for preforming discrete-time analog queuing and comput

Details Apparatus for preforming discrete-time analog queuing and comput Apparatus for preforming discrete-time analog queuing and comput

1995-10-04

1997-07-22

Bocure, Tesfaldet

Pulse or digital communications

Miscellaneous

375316, H03D 324

Patent

active

056510373

ABSTRACT:
A communication receiver (100) utilizing a synthesizer (143) employs a discrete-time phase locked loop which includes a reference oscillator (135), a phase error detector (202), a discrete-time analog computing element (206), an integrator (210), a controlled frequency generator (211, 212), and a frequency divider (214). The discrete-time analog computing element implements a discrete-time analog lead-lag network circuit. This circuit includes a clock and logic circuit (216), at least one discrete-time analog queuing element (218), and an analog computing engine (222). The queuing element (218) includes N analog signal lines, N analog storage lines, N control lines, and N.sup.2 controllable switches. Each controllable switch is coupled between each of the N analog signal lines and each of the N analog storage lines. In addition, N charge storage elements are coupled between each of the N analog storage lines and a common circuit node. The N control lines control the controllable switches in a predetermined sequence.

REFERENCES:
patent: 3953813 (1976-04-01), Yano et al.
patent: 4167711 (1979-09-01), Smoot
patent: 5345234 (1994-09-01), Stewart et al.
patent: 5521556 (1996-05-01), O'Shaughnessy et al.
Jacob Millman "Microelectronics Digital and Analog Circuits and System," McGraw Hill, 192-198, 276-290 1979.
"Analog VLSI and Neural Systems" by Carver Mead, pp. 67-82, 1989.

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