Apparatus for performing multiply and accumulate instructions wi

Details Apparatus for performing multiply and accumulate instructions wi Apparatus for performing multiply and accumulate instructions wi

1992-07-03

1993-08-31

Mai, Tan V.

Boots, shoes, and leggings

G06F 738

Patent

active

052414922

ABSTRACT:
An apparatus for performing multiplications with reduced power includes an arithmetic logic unit and a decode block for performing an equivalent of a multiply instruction. A frequently-encountered multiply instruction occurs between a variable and a known constant. If the known constant is positive or negative one, the decode block enables the arithmetic logic unit to either add the variable to zero, or subtract the variable from zero, in response to the sign bit of the known constant. In response to a multiply and accumulate instruction between a variable and a known constant of positive or negative one, the decode block enables the arithmetic logic unit to either add the variable to the prior accumulated result or to subtract it therefrom, in response to the sign bit of the known constant. In either case, the high-speed multiplier is disabled and its power saved.

REFERENCES:
patent: 4215416 (1980-07-01), Muramatsu
patent: 4215417 (1980-07-01), Nishitani
patent: 4608634 (1986-08-01), Caudel et al.
patent: 4720780 (1988-01-01), Dolecek
patent: 4773006 (1988-09-01), Kinoshita et al.

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