Apparatus for performing multiplications with reduced power and

Details Apparatus for performing multiplications with reduced power and Apparatus for performing multiplications with reduced power and

1991-05-06

1992-07-07

Mai, Tan V.

Boots, shoes, and leggings

364754, G06F 752

Patent

active

051288907

ABSTRACT:
An apparatus for performing multiplications with reduced power includes an arithmetic logic unit and a decode block for performing an equivalent of a multiply instruction. A frequently-encountered multiply instruction occurs between a variable and a known constant. If the known constant is positive or negative one, the decode block enables the arithmetic logic unit to either add the variable to zero, or subtract the variable from zero, in response to the sign bit of the known constant. In response to a mulitply and accumulate instruction between a variable and a known constant of positive or negative one, the decode block enables the arithmetic logic unit to either add the variable to the prior accumulated result or to subtract it therefrom, in response to the sign bit of the known constant. In either case, a high-speed multiplier is disabled and its power saved.

REFERENCES:
patent: 4891779 (1990-01-01), Hasebe

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