Apparatus for performing inverse discrete cosine transform

Details Apparatus for performing inverse discrete cosine transform Apparatus for performing inverse discrete cosine transform

1993-03-12

1995-02-07

Coles, Sr., Edward L.

Facsimile and static presentation processing

Facsimile

Auxiliary signal

358432, 358426, 382 56, H04N 1415

Patent

active

053879821

ABSTRACT:
An apparatus for performing an inverse discrete cosine transform, which reduces the number of operation times of the inverse discrete cosine transform including a row and column priority determining unit 10 for determining a priority direction of an operation at a time when a two-dimensional inverse discrete cosine transform is replaced with at least one one-dimensional inverse discrete cosine transform, one-dimensional inverse DCT operating units 11, 13 connected to the row and column priority determining unit 10 for detecting zero elements and for performing a multiply-addition according to a result of the detection, and a random access memory 12, connected to the one-dimensional inverse DCT operating units 11, 13 for storing a result of the multiply-addition performed by the one-dimensional inverse DCT operating unit 11.

REFERENCES:
patent: 5054103 (1991-10-01), Yasuda et al.
patent: 5196946 (1993-03-01), Balkanski et al.
U. Totzek, et al, "CMOS VLSI Implementation of the 2-D-DCT with Linear Processor Arrays" pp. 937-940, Proc. of Int. Conf. on Acoustic, Speech, and Signal Processing, IEEE, 1990.
Y. Inoue, et al "A 100 MHz 2-Dimensional Discrete Cosine Transform Core LSI", pp. 1-8, ICD91-109, 1991.
Y. Uetani, et al "High-Precision and High-Speed DCT-LSI", pp. 623-626, Toshiba Review vol. 45, No. 8, 1990.

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