Boots – shoes – and leggings
Patent
1995-11-13
1998-11-03
Elmore, Reba I.
Boots, shoes, and leggings
3647151, G06F 750
Patent
active
058318844
ABSTRACT:
A leading zero anticipatory logic circuit generates a first result by AND operation of ith bit (i is an integer; 1.ltoreq.i.ltoreq.m) of a first mantissa and an ith bit of a second mantissa; generates a second result by NOR operation of the ith bit of the first mantissa and the ith bit of the second mantissa; generates a third results by an OR operation of the first and second results; generates a fourth result by OR operation of the (i-1)th bit of the first mantissa and the (i-1)th bit of the second mantissa; and generates a leading-zero anticipatory bit E.sub.i of the ith digit by an AND operation of the third and fourth results. Based on the counted number of the leading-zero anticipated by leading-zero anticipatory logic circuit, shifter circuits shift the result of addition.
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Computer Organization and Design, by John L. Hennessy et al., Chapter 4, pp. 225-244, Jun. 1994.
Dolan Robert J.
Elmore Reba I.
Mitsubishi Denki & Kabushiki Kaisha
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