Apparatus for on-board programming of serial EEPROMS

Static information storage and retrieval – Hardware for storage elements

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C365S063000

Reexamination Certificate

active

06519172

ABSTRACT:

TECHNICAL FIELD
This invention relates generally to electronic devices, and more particularly to memory modules.
BACKGROUND OF THE INVENTION
In today's computer systems, a computer's random access memory (RAM) typically includes a number of memory modules, such as single in-line memory modules (SIMMs) and dual in-line memory modules (DIMMs). These memory modules include a number of individual memory chips mounted on a circuit board. The circuit board electrically connects the terminals of the chips to edge connectors located on a lower edge of the circuit board. The memory modules are then plugged into memory slots, which electrically connect the edge connectors of the memory module to other units within the computer system.
Computer designers may choose from numerous available, standardized memory modules of various types, sizes and configurations. If each memory module can itself provide information identifying the type and size of the memory module to external circuitry, computer systems can be designed which are compatible with a wide variety of memory modules. Other components of the computer system simply access the information identifying the memory module and interact with the memory module accordingly.
There exist numerous and well-known ways of storing the information identifying the type and size of memory module. One such way is to provide a plurality of jumpers on the circuit board, the state of each of the jumpers indicating by binary code the type, size and configuration of memory module contained on the circuit board. Alternatively, a non-volatile memory device, such as a Serial EEPROM can be preprogrammed with the identifying code, and then mounted on the circuit board together with the volatile RAM units, such as dynamic random access memory devices (DRAMs).
SUMMARY OF THE INVENTION
According to the present invention, a memory module is provided which can be programmed with module information identifying the type and size of the memory module. This module information is conveniently programmed after completed assembly of the memory module. The memory module is configured to receive data from external circuitry for storing, and to provide stored data to the external circuitry. The memory module includes a plurality of terminals for electrically connecting the memory module to the external circuitry, and a plurality of volatile memory devices electrically connected to corresponding terminals for receiving and providing data from and to the external circuitry. The memory module includes a non-volatile memory device for storing the module information. The non-volatile memory device has a first port and a second port, with the first port electrically connected to a first of the terminals for providing the module information to the external circuitry. The second port of the non-volatile memory device is for receiving an enabling signal which selectively enables the non-volatile memory device to receive module information for storing within the non-volatile memory device or to provide the module information to the external circuitry.
The memory module also includes interface circuitry which couples the second port of the non-volatile memory device with a second of the module terminals. The second terminal is for connecting to an electric potential which enables the non-volatile memory device to receive module information for storage. The second terminal is coupled to the second port of the non-volatile memory with one of a number of possible circuit elements for temporarily connecting the second port of the non-volatile memory device with the second terminal. Examples of such circuit elements include a jumper, a low impedance unit, and a fuse.
In contrast with the prior art, which requires programming the module information in the non-volatile device prior to assembly of the memory module, the coupling of the second port of the non-volatile memory device with the second module terminal provides for ready programming of the module information after completed memory module assembly.


REFERENCES:
patent: 4436584 (1984-03-01), Bernacki et al.
patent: 4498151 (1985-02-01), Henry
patent: 4750136 (1988-06-01), Arpin et al.
patent: 4763333 (1988-08-01), Byrd
patent: 4783766 (1988-11-01), Samachisa et al.
patent: 4785424 (1988-11-01), Lin et al.
patent: 4800533 (1989-01-01), Arakawa
patent: 4855955 (1989-08-01), Cloaca
patent: 4888738 (1989-12-01), Wong et al.
patent: 4975878 (1990-12-01), Boddu et al.
patent: 4975883 (1990-12-01), Baker et al.
patent: 4992137 (1991-02-01), Cathey, Jr. et al.
patent: 5029131 (1991-07-01), Vancu
patent: 5047979 (1991-09-01), Leung
patent: 5101379 (1992-03-01), Lin et al.
patent: 5197034 (1993-03-01), Fandrich et al.
patent: 5224070 (1993-06-01), Fandrich et al.
patent: 5243577 (1993-09-01), Ueda et al.
patent: 5262990 (1993-11-01), Mills et al.
patent: 5274778 (1993-12-01), Hall
patent: 5274827 (1993-12-01), Haggerty et al.
patent: 5325368 (1994-06-01), James et al.
patent: 5383147 (1995-01-01), Sanemitsu
patent: 5383148 (1995-01-01), Testa et al.
patent: 5383161 (1995-01-01), Sanemitsu
patent: 5384748 (1995-01-01), Sanemitsu
patent: 5436862 (1995-07-01), Sanemitsu
patent: 5475854 (1995-12-01), Thomsen et al.
patent: 5479498 (1995-12-01), Brandman et al.
patent: 5486129 (1996-01-01), Sandhu et al.
patent: 5495593 (1996-02-01), Elmer et al.
patent: 5517646 (1996-05-01), Piccirillo et al.
patent: 5519831 (1996-05-01), Holzhammer
patent: 5572457 (1996-11-01), Michael
patent: 5613094 (1997-03-01), Khan et al.
patent: 5661677 (1997-08-01), Rondeau, II et al.
patent: 5663901 (1997-09-01), Wallace et al.
patent: 5732017 (1998-03-01), Schumann et al.
patent: 5774647 (1998-06-01), Raynham et al.
patent: 5790890 (1998-08-01), Mirov et al.
patent: 5859792 (1999-01-01), Rondeau, II et al.
patent: 5862314 (1999-01-01), Jeddeloh
patent: 5953243 (1999-09-01), Capps, Jr. et al.
patent: 5963463 (1999-10-01), Rondeau, II et al.
patent: 5963464 (1999-10-01), Dell et al.
patent: 5974500 (1999-10-01), Maletsky et al.
patent: 5991194 (1999-11-01), Jigour et al.
patent: 5995405 (1999-11-01), Trick
patent: 6067593 (2000-05-01), Schade
patent: 6243282 (2001-06-01), Rondeau, II et al.
patent: 6256217 (2001-07-01), Rondeau, II et al.
SGS-Thomson Microelectronics, Write Protection in the 12C and X12C EEPROM Families, Application Note, Y. Bahout, author.
IBM Technical Disclosure & Bulletin, vol. 38, No. 02, Feb. 1995.
Intel Corporation, 66 MHz 64-Bit Unbuffered SDRAM DIMM Revision 1.1, 43 pages Jan. 29, 1996.
JEDEC Standard No. 21-C, Configurations for State Memories, pp. 4.1.2-1 to 4.1.2-4, http://www.jedec.org/download/pub21/updated Feb. 8, 200, “Serial Presence Detect Standard, General Standard.”
JEDEC Standard No. 21-C, Configurations for State Memories, pp. 4.4.7-1 to 4.4.7-4, http://www.jedec.org/download/pub21/updated Feb. 8, 2000, “80 Pin EEPROM SIMM Family.”
Microchip Technology Incorporated, DS00551A, Microchip AN551, pp 8-121 to 8-124, Copyright 1993, “Serial EEPROM Solutions vs. Parallel Solutions.”

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Apparatus for on-board programming of serial EEPROMS does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Apparatus for on-board programming of serial EEPROMS, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus for on-board programming of serial EEPROMS will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3147229

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.