Apparatus for obtaining data from a translation memory based on

Details Apparatus for obtaining data from a translation memory based on Apparatus for obtaining data from a translation memory based on

1993-11-03

1996-03-26

Whitfield, Michael A.

Boots, shoes, and leggings

364DIG1, G06F 1210

Patent

active

055028292

ABSTRACT:
An adder adds a displacement address to a base address to generate a virtual address. The adder includes carry indicating circuitry for generating a carry indicating signal indicating whether the addition of the displacement address to the base address resulted in a carry. Addressing circuitry addresses the translation memory with a subset of bits from the base address so that the translation memory outputs multiple address translation entries simultaneously. At approximately the same time the translation memory outputs the multiple address translation entries, the adder completes the addition of the displacement address to the base address and generates the carry indicating signal. A multiplexer selects one of the address translations output from the translation memory in response to the carry indicating signal.

REFERENCES:
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patent: 4837738 (1989-06-01), Lemay et al.
patent: 5150471 (1992-09-01), Tipon et al.
patent: 5335333 (1994-08-01), Hinton et al.
patent: 5347636 (1994-09-01), Ooi et al.

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