Apparatus for multi-processor communications

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3642295, G06F 1516

Patent

active

049224085

ABSTRACT:
A communication network formed by a plurality of communication processors which are connected together in hexagonal array is disclosed. The data processing system consists of a plurality of data processors. Each data processor is coupled to a communication processor which is responsible for sending messages to and receiving messages from other communication processors. Each communication processor communicates with the 6 communication processors adjacent to it through 6 ports. When a given data processor wishes to send a message to another data processor, it transfers the message to its communication processor which in turn transfers the message to the communication processor coupled to one of these 6 ports with information specifying the final destination of the message. The message routing algorithm used by each of communication processors automatically reroutes messages around communication bottlenecks created by a malfunctioning communication processor or by a local communication overload.

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Charles L. Seitz, "Concurrent VLSI Architectures", IEEE Transactions on Computers, vol. C-33, No. 12, Dec. 1984, pp. 1247-1265.

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