Computer graphics processing and selective visual display system – Computer graphic processing system – Integrated circuit
Patent
1997-03-18
1999-01-26
Chang, Vivian
Computer graphics processing and selective visual display system
Computer graphic processing system
Integrated circuit
345126, 345127, G09G 500
Patent
active
058643478
ABSTRACT:
A display control circuit that enables efficient image rotation, and scaling of bit-mapped image data stored in image memory, in synchronization with dot clock, line, or frame timing of a target display device without requiring re-writing of the display memory contents. Addresses output from a memory address counter are modified by multiplication and summation with desired image display parameters to generate new addresses for retrieving desired image data from memory locations that are physically mapped to the modifications desired for a new output image. The basic image data is not itself modified. Timing of multiplication and summation processes is synchronized to the timing of the target display device and is performed during horizontal or vertical retrace line intervals. Additional summations of address values with the display parameters is performed by dot and line. It is, therefore, possible to achieve smooth image rotation without relying on high clock rate multiplication operations timed to the dot clock frequency by using a multiplication operation once every display frame or line, and a cumulative addition operation once every dot or display line. Multipliers can operate at a low clock rate, and time-shared use is possible, enabling the circuit to be constructed on a small scale and at low cost.
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Chang Vivian
Seiko Epson Corporation
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