Boots – shoes – and leggings
Patent
1989-01-19
1990-06-12
Zache, Raulfe B.
Boots, shoes, and leggings
3642434, 36424341, 36424342, 36424343, G06F 900
Patent
active
049338358
ABSTRACT:
A microprocessor system is disclosed having a high speed system bus for coupling system elements, and having a dual bus microprocessor with separate ultra-high speed instruction and data cache-MMU interfaces coupled to independently operable instruction and data cache-MMU, respectively. A main memory is coupled to the system bus for selectively storing and outputting digital information. The instruction and data cache-MMU's are coupled to the main memory via the system bus for independently storing and outputting digital information to respective mapped addressable very high speed cache memory. The microprocessor is coupled via separate and independent very high speed instruction and data buses to each of the instruction cache-MMU and data cache-MMU, respectively, for processing data received from the data cache-MMU responsive to instructions received from the instruction cache-MMU. The instruction bus and data bus are exclusive and independent of one another, and allow for simultaneous very high-speed transfer. The data cache-MMU and instruction cache-MMU each have separate dedicated system bus interfaces for coupling to the main memory and to other peripheral devices which are coupled to the system bus. Numerous other system elements can also be coupled to the system bus, including an interrupt controller, an I/O processor, a bus arbiter, an array processor, and other peripheral controller devices.
REFERENCES:
patent: 3693765 (1972-09-01), Reiley et al.
patent: 3723976 (1973-03-01), Alvarez et al.
patent: 3761881 (1973-09-01), Anderson et al.
patent: 3764996 (1973-10-01), Ross
patent: 3896419 (1975-07-01), Lange et al.
patent: 3898624 (1975-08-01), Tobias
patent: 3902164 (1975-08-01), Kelley et al.
patent: 3956737 (1976-05-01), Ball
patent: 4037209 (1977-07-01), Nakajima et al.
patent: 4057848 (1977-11-01), Hayashi
patent: 4068303 (1978-01-01), Morita
patent: 4077059 (1978-02-01), Cordi et al.
patent: 4144563 (1979-03-01), Heuer et al.
patent: 4151593 (1979-04-01), Jenkins et al.
patent: 4161024 (1979-07-01), Joyce et al.
patent: 4161036 (1979-01-01), Morris et al.
patent: 4173783 (1979-11-01), Couleur
patent: 4179734 (1979-12-01), O'Leary
patent: 4189767 (1979-12-01), Ahuja
patent: 4195352 (1980-03-01), Tu et al.
patent: 4215402 (1980-04-01), Mitchell
patent: 4228497 (1980-10-01), Gupta
patent: 4229789 (1980-10-01), Morgan
patent: 4257097 (1981-03-01), Morgan
patent: 4295193 (1981-10-01), Pomerene
patent: 4310880 (1982-01-01), Gehman
patent: 4314331 (1982-02-01), Porter et al.
patent: 4325120 (1982-02-01), Colley et al.
patent: 4348724 (1982-09-01), Cushing et al.
patent: 4354225 (1982-10-01), Frieder
patent: 4360869 (1982-11-01), Stanley
patent: 4371928 (1983-02-01), Barlow et al.
patent: 4378591 (1983-03-01), Lemay
patent: 4381541 (1983-04-01), Baumann, Jr. et al.
patent: 4386402 (1983-05-01), Toy
patent: 4392200 (1983-07-01), Arulpragasam et al.
patent: 4392201 (1983-07-01), Brown et al.
patent: 4398243 (1983-08-01), Holberger
patent: 4400774 (1983-08-01), Toy
patent: 4405980 (1983-09-01), Hess
patent: 4407015 (1983-09-01), Ziobro
patent: 4407016 (1983-09-01), Bayliss et al.
patent: 4415969 (1983-11-01), Bayliss
patent: 4439824 (1984-03-01), Tsiang
patent: 4442487 (1984-04-01), Fletcher et al.
patent: 4443848 (1984-04-01), Gehman
patent: 4464712 (1984-08-01), Fletcher
patent: 4481573 (1984-11-01), Fukugana et al.
patent: 4482952 (1984-11-01), Akagi
patent: 4493020 (1985-01-01), Kim et al.
patent: 4498135 (1985-02-01), Caudel
patent: 4500962 (1985-02-01), Lamaire et al.
patent: 4502110 (1985-02-01), Saito
patent: 4507728 (1985-03-01), Sakamoto et al.
patent: 4513369 (1985-04-01), Sato
patent: 4563737 (1986-01-01), Nakamura et al.
patent: 4581702 (1986-04-01), Saroka et al.
patent: 4604688 (1986-08-01), Tone
patent: 4620275 (1986-10-01), Wallach et al.
patent: 4635194 (1987-01-01), Burger et al.
patent: 4654819 (1987-03-01), Stiffler et al.
patent: 4669043 (1987-05-01), Kaplinsky
patent: 4680700 (1987-07-01), Hester et al.
patent: 4680702 (1987-07-01), McCarthy
patent: 4682281 (1987-07-01), Woffinden et al.
patent: 4685082 (1987-08-01), Cheung et al.
patent: 4701844 (1987-10-01), Thompson et al.
patent: 4727484 (1988-02-01), Saito
patent: 4731739 (1988-03-01), Woffinden et al.
patent: 4740969 (1988-04-01), Fremont
Losq, et al., "Conditional Cache Miss Facility for Handling Short/Long Cache Requests", IBM TDB, vol. 25, No. 1, Jun. '82, pp. 110-111.
MC68120/MC68121--Intelligent Peripheral Controller Users Manual, Motorola, Inc.
Electronics International, vol. 55, No. 16, Aug. 1982, pp. 112-117, N.Y., 115; P. Knudsen: "Supermini Goes Multiprocessor Route to Put it up Front in Performance".
Cho James Y.
Hollingsworth Walter H.
Sachs Howard G.
Intergraph Corporation
Mills John G.
Zache Raulfe B.
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