Apparatus for invalidating the content of an instruction buffer

Details Apparatus for invalidating the content of an instruction buffer Apparatus for invalidating the content of an instruction buffer

1982-05-06

1985-02-19

Smith, Jerry

Boots, shoes, and leggings

G06F 930

Patent

active

045009597

ABSTRACT:
In a data processing system having an instruction buffer, inconsistency between an instruction stored in a main memory and the same instruction present in the instruction buffer occurs at the time of a store operation to the memory if the instruction supplied to the store area of the main memory previously has been prefetched to and is present in the instruction buffer. The changing in the memory of the content of the instruction prefetched to the instruction buffer and the fact that the changed instruction is about to be executed are detected on the basis of the instruction fetch address of an instruction to be fetched from the memory to the instruction buffer, the instruction address of the next instruction to be executed, information concerning the byte position at which the instruction to be executed is stored, the store address at which the changed instruction is stored in the main storage and information concerning the byte position in the main storage of the instruction which is changed by the store operation. When the execution of the instructions proceeds to the changed instruction, the content of the instruction buffer is invalidated.

REFERENCES:
patent: 4040030 (1977-08-01), Cassonnet
patent: 4042912 (1977-08-01), Bachman et al.
patent: 4044334 (1977-08-01), Bachman et al.
patent: 4050058 (1977-09-01), Garlic
patent: 4179737 (1979-12-01), Kim
patent: 4245302 (1981-01-01), Amdahl
patent: 4298927 (1981-11-01), Berglund et al.
patent: 4371924 (1983-02-01), Schaefer et al.

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