Apparatus for interconnecting logic boards

Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices

Reexamination Certificate

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C361S803000, C361S689000, C439S059000, C439S061000, C439S062000, C174S261000

Reexamination Certificate

active

06335867

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to apparatus for interconnecting logic boards, which is preferably applicable to equipment for transmitting signals at high speed between a plurality of logic boards through the intermediary of interconnecting boards.
Apparatuses for transmitting signals between a plurality of logic boards through a backplane and interconnecting boards have been adopted in computers and switchboards. For example, computers, such as a workstation for transmitting signals between logic boards through bus wires provided on a backplane to which a plurality of logic boards, including a processor, memories, I/O devices are connected, are disclosed in pp. 330-337 of Digest of Technical Papers (issued in February, 1993) of CONPCON 93. In the connection method along the bus, the number of signals which are input or output through a logic board ranges from several bytes to ten odd bytes (8 bytes for example). The transfer frequency is in a range of 30 to no more than 80 MHz. This is due to high load because of a plurality of logic boards being connected to the bus wires and also due to the difficulty in increasing the transfer frequency owing to the disorder of waveform caused by reflections from each logic board.
With the increase in the operation frequency of the processors and also with the progress in multiprocessing, the throughput of data transfer becomes insufficient so long as the bus connection method is used. To solve this problem, it is required to adopt the switch connection method. To give an example, the switch connection method is to provide interconnecting boards, form a switch by LSI (semiconductor integrated circuit device) on each interconnecting board, and transmit signals between the logic boards through the intermediary of switches. In this switch connection method, it is possible to make a one-to-one connection between the logic LSI's on the logic boards and the switch LSI's on the interconnecting boards, thereby improving the transfer frequency to higher than 100 MHz. Apparatus for transmitting signals between a plurality of logic boards through interconnecting boards is disclosed U.S. Pat. No.5,122,691. The above-mentioned known example is shown in
FIG. 7
, in which reference numerals
5
a
,
5
b
denote logic boards,
76
b
denotes a logic LSI mounted on a logic board
5
b
, and a similar LSI is mounted also in a logic board
5
a
. Numeral
76
b
denotes a connector for connecting the logic board
5
b
to the interconnecting boards
72
g
to
72
j
. Numeral
74
g
denotes an interconnecting LSI, mounted on an interconnecting board, which forms a switch for example. One each of the same LSI is mounted on the interconnecting boards
72
h
to
72
j
. In this prior-art example, logic boards
5
are directly connected to the interconnecting boards
72
without intervention of a backplane, and the logic boards
5
and the interconnecting boards
72
exchange signals through pins of the connector
76
at the intersections of the logic boards
5
and the interconnecting boards
72
. Accordingly, there are a limited number of pins connecting the logic boards to a single interconnecting board
72
(3 pins in an embodiment of U.S. Pat. No. 5,122,691, of which 2 pins are for signals). Therefore, in order to transfer data of 8 bytes (64 bits) per logic board, more than 30 interconnecting boards are required, which results in the first problem of difficulty in mounting and assembling those boards and hence a high production cost.
When the switch connection method is adopted to improve throughput, there arise the following problems. As the transfer frequency improves, it becomes impossible to transfer data in one cycle, so that it will become necessary to adopt a method of transferring data in two or more cycles. In this case, it becomes necessary to equalize propagation delays in the transfer of data between the logic boards and the interconnecting boards, and it becomes necessary to at least equalize wire lengths between the logic boards and the interconnecting boards. However, in the switch connection method, because there is a large number of wires used (the number of logic boards×the number of input and output signals per logic board), the second problem is that a large number of man-hours for design are required to equalize the length of all wires. Though JP-A-62-204359 discloses the necessity to equalize the wire lengths in the transfer method as mentioned above, it does not disclose a wiring method.
SUMMARY OF THE INVENTION
It is an object of the present invention to solve the first and the second problems and provide a logic board interconnection apparatus which realizes low cost and high reliability and high-speed signal transmission.
The first problem can be solved effectively by connecting the logic boards and the interconnecting boards to a backplane, transmitting signals through the connector pins other than at the intersections of the logic boards and the interconnecting boards, thereby increasing the number of signals that the interconnecting boards couple to the backplane and decreasing the number of the interconnecting boards used. The second problem can be solved effectively by connecting all logic boards to the backplane with the logic boards in vertical position, that is, at right angles with the interconnecting boards and mutually spaced apart by a specified distance and so on. More specifically, by dividing connectors connecting the interconnecting boards and the backplane into regions of the number of the logic boards, allotting the divided regions to the logic boards in a designated order, dividing the connectors for connecting the logic boards and the backplane into regions of the number of the interconnecting boards, allotting the divided regions to the interconnecting boards in a designated order, and connecting the regions of the connectors for the interconnecting boards and the regions of the connectors for the logic boards on one-to-one correspondence by wires on the backplane, so that all wire lengths connecting the logic boards and the interconnecting boards can be equalized easily.
According to the present invention, in connection between the logic boards and the interconnecting boards, equilong wiring for data several bytes long can be done easily, which will contribute to lower cost, higher reliability and high-speed signal transmission.


REFERENCES:
patent: 4838798 (1989-06-01), Evans et al.
patent: 5023754 (1991-06-01), Aug et al.
patent: 5091822 (1992-02-01), Takahima
patent: 5119273 (1992-06-01), Corda
patent: 5296748 (1994-03-01), Wicklund et al.
patent: 5488541 (1996-01-01), Mistry et al.
patent: 5603044 (1997-02-01), Annapareddy et al.
patent: 5650757 (1997-07-01), Barber
patent: 5696667 (1997-12-01), Berding
patent: 5982634 (1999-11-01), Wronski
patent: 6163464 (2000-12-01), Ishibashe et al.
patent: 6181570 (2001-01-01), Ellebrecht et al.
patent: 62-204359 (1987-09-01), None
“Multiprocessor Features of the HP Corporate Business Servers”, CONPCON Spring '93, Digest of Technical Papers, Feb. 1993, K. Chan et al, pp. 330-337.

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