Apparatus for increasing the number of hits in a translation loo

Details Apparatus for increasing the number of hits in a translation loo Apparatus for increasing the number of hits in a translation loo

1990-12-21

1994-04-19

Dixon, Joseph L.

395425, G06F 1200, G06F 1210

Patent

active

053054440

ABSTRACT:
A translation lookaside buffer for caching virtual addresses from a plurality of sources along with the associated physical addresses which physical addresses must be rapidly accessable and in which virtual addresses may appear simultaneously from two of the sources requiring translation into physical addresses, including a primary cache for storing a plurality of individual virtual addresses and associated physical addresses from all of the plurality of sources, apparatus for storing a single virtual address and its associated physical address from one of the plurality of sources which occurs most often each time a virtual address and an associated physical address from that one of the plurality of sources is referenced in the primary cache, and apparatus for ascertaining whether the virtual address held in the apparatus for storing a single virtual address and an associated physical address is a virtual address sought when an attempt is made to access the primary cache for a virtual address from the one of the plurality of sources and for another of the plurality of sources simultaneously.

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Intel Cache Tutorial, Chapter 2, "Basic Cache Architecture" 1990 pp. 2-21, 2-22.
"Computer Architecture A Quantitative Approach" by David A. Patterson, Morgan Kaufmann Publication, 1990 pp. 475-480.
"A VLSI Chip Set for a High-Performance VAX" by Richard R. Heye, Oct., 1985, Proceedings IEEE Intl Conf. on Computer Design, pp. 347-352.

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