Apparatus for I/O leakage self-test in an integrated circuit

Details Apparatus for I/O leakage self-test in an integrated circuit Apparatus for I/O leakage self-test in an integrated circuit

1999-06-14

2001-07-17

Metjahic, Safet (Department: 2858)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S760020, C324S765010, C324S537000, C327S543000, C365S229000

Reexamination Certificate

active

06262585

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the field of integrated circuits; more particularly, the present invention relates to testing leakage current of an input/output buffer in an integrated circuit.
BACKGROUND
FIG. 1
illustrates a typical output driver included in an integrated circuit. The output driver includes a pre-driver, a PMOS transistor P coupled to a line voltage (Vcc) and an output pad. The output driver also includes an NMOS transistor N coupled to the output pad and ground. The output driver is typically used to boost the signal of data received from other components of an integrated circuit prior to transmission via the pad. However, the output driver must function properly in order to accurately transmit the data Damaged or short-circuited devices are unreliable because a current path may exist from the output pad through to the circuit power supplies, although one or both of the transistors are deactivated. This condition in an output driver is commonly referred to as leakage current.
One method of determining whether an output driver is damaged or short-circuited is to conduct a leakage test. In order to conduct a leakage test, the P and N transistors are turned off, a voltage is forced to the output pad from an external source, and the resulting current is measured at the output pad. Once the transistors are turned off, the measured current should not exceed a predetermined threshold value. If the current exceeds the threshold value, the output driver is considered damaged.
One way to conduct a leakage test is to physically contact each output pad in an integrated circuit with a tester and assert a high voltage potential to determine if there is an excessive current path measured through the N transistor to ground. Alternatively, a low voltage potential may be applied to a pad to determine if an excessive current path measured from Vcc through the P transistor. The process of physically touching each output pad with a tester is cumbersome since an integrated circuit may contain numerous input/output buffers. Further, physically touching each output pad is costly due to the expensive equipment needed for accurate measurement. Therefore, an apparatus for self-testing for leakage current in an is input/output cell is desired.
SUMMARY OF THE INVENTION
According to one embodiment, an integrated circuit is disclosed that includes a first input/output (I/O) circuit and a leakage detection circuit coupled to the first I/O circuit. The leakage detection circuit tests the first I/O circuit for excessive leakage current.


REFERENCES:
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