Electric resistance heating devices – Heating devices – Radiant heater
Reexamination Certificate
1999-02-02
2001-02-13
Walberg, Teresa (Department: 3742)
Electric resistance heating devices
Heating devices
Radiant heater
C392S418000, C219S390000, C219S405000, C118S724000
Reexamination Certificate
active
06188838
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a method and an apparatus for semiconductor wafer heat treatment.
Conventionally, in order to form a thin film such as an oxide film on a wafer or diffuse an impurity in a wafer, a heat treatment for heating a wafer is performed. At this time, a semiconductor wafer heat treatment apparatus shown in
FIG. 1A
is used, for example.
The semiconductor wafer heat treatment apparatus shown in
FIG. 1A
is called a batch-system hot-wall-type diffusion furnace, and is constituted by a boat (i.e., a jig)
2
for holding a plurality of wafers
1
, a chamber
3
constituting a processing chamber for processing the wafers
1
held in the boat
2
, and a heater
4
for heating the wafers. In the chamber
3
, an inlet
5
for introducing, e.g., a reaction gas into a reaction chamber and an outlet
6
for exhausting the reaction gas from the reaction chamber are arranged.
Each wafer
1
is horizontally held such that the edge portion of the wafer
1
are loaded on convex portions formed in the boat
2
. The wafer
1
is, as shown in
FIG. 1B
for example, held at, e.g., four holding points
7
formed on the edge portion for the following reason. That is, a contact area between the wafer
1
and the boat
2
is minimized to reduce an amount of heat radiation absorbed by the boat
2
and uniformly heat the wafer
1
. When the wafer
1
is loaded on the boat
2
or unloaded from the boat
2
, the above arrangement is employed to make treatment of the wafer
1
easy. In this manner, a member for horizontally holding the wafer
1
is generally called a susceptor.
However, due to the gravitational load of the wafer
1
, stress is generated inside the wafer
1
and at the holding points
7
in the wafer
1
. In particular, since the holding points
7
are similar to dots, stress is concentrated on the holding points
7
.
Stress &sgr; generated inside the wafer
1
can be calculated on the basis of the following equation:
&sgr;=(3×(3+&ngr;)×
q×r
2
)/(8×
h
2
) (1)
where &ngr; is Poisson's ratio, q is a load per unit area, r is the radius of the wafer, and h is the width (thickness) of the wafer.
FIG. 2
shows the relationship between the stress generated inside the wafer and the diameter of the wafer. As a parameter, the thickness of the wafer is changed. Since the gravitational load of the wafer increases with an increase in diameter of the wafer, the stress increases. When the thickness of the wafer decreases, the stress of that increases.
When a heat treatment at a high temperature is performed in a state where such stress is present inside the wafer, a crystal defect generally called a slip occurs inside the wafer. For example, when the diameter of the wafer is 200 mm, the stress inside the wafer is about 5×10
6
. It is known that a slip occurs due to the gravitational load of the wafer when a heat treatment at about 1,200° C. is performed in the state where the stress is present inside the wafer.
With an increase in diameter of the wafer, as shown in
FIG. 2
, stress generated inside the wafer increases. In general, as stress increases, a temperature at which the slip occurs decreases.
FIG. 3A
shows the relationship between a temperature in which a slip occurs inside a wafer and a diameter of the wafer. Referring to
FIG. 3A
, in a boundary region, occurrence of a slip is influenced by not only stress but also another factor. For this reason,
FIG. 3A
shows the temperature region in which a slip occurs varies. As shown in
FIG. 3A
, the diameter of the wafer increases, stress (see
FIG. 3B
) generated by the gravitational load increases. For this reason, a critical temperature at which a slip occurs decreases. More specifically, occurrence of a crystal defect caused by stress generated by gravitational load becomes a more remarkable problem in accordance with an increase in diameter of the wafer.
The above problems are summarized as follows.
In a conventional method and apparatus for semiconductor wafer heat treatment, stress is generated inside the wafer by the gravitational load of the wafer. When a heat treatment is performed in the presence of the stress, a crystal defect disadvantageously occurs. Since the gravitational load of the wafer increases with an increase in diameter of the wafer, a crystal defect disadvantageously occurs in a heat treatment at a lower temperature.
BRIEF SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a method and an apparatus for semiconductor wafer heat treatment which can suppress a crystal defect from occurring in a wafer when the wafer is horizontally held to be subjected to a heat treatment.
According to one aspect of the present invention, there is provided an apparatus for semiconductor wafer heat treatment, comprising a susceptor for holding a wafer such that the wafer is made flat at a heat treatment temperature; a jig for supporting the susceptor; and a heater for heating the wafer held by the susceptor.
In this apparatus, the susceptor may include means for preventing deformation caused by a gravitational load of the wafer. The susceptor may include means for suppressing stress to be generated inside the wafer. The susceptor may support the wafer at a plurality of portions including a central portion of the wafer. The susceptor may be constituted by an elastic platy member which is convex upward with respect to the direction of the gravity. In this case, the susceptor may have a level difference in height between its peripheral portion and central portion, which has been determined in accordance with rigidity, thickness, and diameter of the susceptor. The susceptor may be constituted by a material having rigidity higher than that of the wafer. A thickness distribution of the susceptor may-be not uniform. The susceptor may have a void portion. The susceptor may have a first portion forming an outer peripheral portion of the susceptor, and a second portion arranged inside the first portion and constituted by a material having a thermal expansivity larger than that of the first portion. Both of the susceptor and jig may be unified into one member. The susceptor may be loaded on part of the jig.
According to another aspect of the present invention, there is provided a method of semiconductor wafer heat treatment, comprising the steps of forming, on one surface of a wafer, a platy member for generating tensile stress between the platy member and wafer; holding the platy member such that the tensile stress is effected downward with respect to the direction of the gravity and the wafer is made flat at a heat treatment temperature; and performing a heat treatment for the wafer.
This method may further comprise the step of setting a thickness of the platy member such that the stress generated in the wafer by formation of the platy member is equal to the stress generated by gravitational load of the wafer.
According to still another aspect of the present invention, there is provided a method of semiconductor wafer heat treatment, comprising the steps of forming, on one surface of a wafer, a platy member for generating compressive stress between the platy member and wafer; holding the platy member such that the compressive stress is effected upward with respect to the direction of the gravity and the wafer is made flat at a heat treatment temperature; and performing a heat treatment for the wafer.
This method may further comprise the step of setting a thickness of the platy member such that the stress generated in the wafer by formation of the platy member is equal to the stress generated by gravitational load of the wafer.
Additional objects and advantages of the present invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the present invention. The objects and advantages of the present invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out in the appe
Mikata Yuichi
Yamamoto Akihito
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Fuqua Shawntina T
Kabushiki Kaisha Toshiba
Walberg Teresa
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