Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1989-10-18
1990-10-02
Miller, Stanley D.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307443, 307269, 307601, 371 223, H03K 1902, H03K 1716
Patent
active
049610139
ABSTRACT:
A scan testable circuit in a computer system is controlled by using a single scan clock and a fixed delay circuit to realize the required scan clocks and a required scan mode enable signal. The multiple signals are generated from a subset of signals supplied to the scan control signal generation circuit. System data and scan data are routed through a multiplexer to test or initialize lines and circuitry. A scan control signal generation circuit according to the invention has the advantage of eliminating as excess a scan mode enable signal originating elsewhere in the computer system, thereby eliminating unneeded signal traces while minimizing the number of pins required for this function. In a first embodiment, a scan mode enable signal is generated from one of two scan clocks. In a second embodiment, both scan clocks and the scan mode enable signal are generated from a single source clock.
REFERENCES:
IBM Tech. Disc. Bul. "Simplified LSSD Clock Generator" Bersac et al., vol. 27, No. 4A, 9/84.
IBM Tech. Dis. Bul. "Functional Use of LSSD a Clock" vol. 31, No. 12, May 1989.
Obermeyer, Jr. John R.
Shelton John F.
Williamson Donald A.
Griffin Roland I.
Haggard Alan H.
Hewlett--Packard Company
Miller Stanley D.
Wambach Margaret Rose
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