Excavating
Patent
1994-09-15
1995-09-26
Nguyen, Hoa T.
Excavating
G01R 3128
Patent
active
054539951
ABSTRACT:
An apparatus for generating test signals, preferably for use in an integrated circuit tester, comprises a sequencer, a Vector Memory and a Waveform Memory. The Vector Memory is addressed by the sequencer and contains coded waveform information, which is, in turn, decoded into control information by the Waveform Memory. For this purpose, the data outputs of the Vector Memory control the address inputs of the Waveform Memory. The data outputs of the Waveform Memory control circuitry like a formatter or a comparator which link the waveform information with timing information from one or more edge generators. The formatters, comparators etc. are, in turn, in connection with a device under test. The present apparatus provides full flexibility in the generation of formats and waveforms and, in particular, timing and format changes "on the fly", i.e. without additional delay. Flexibility may be increased if the Waveform Memory is reprogammable.
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Hewlett--Packard Company
Nguyen Hoa T.
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