Apparatus for generating phase shifted clock signals

Details Apparatus for generating phase shifted clock signals Apparatus for generating phase shifted clock signals

1990-08-13

1991-11-19

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307269, 307452, 307594, 307605, 328 55, 328155, 328 61, H03K 500, H03K 1920, H03K 5159, H03K 513

Patent

active

050668684

ABSTRACT:
Clock phase shifting circuitry includes a cascade connection of inverting amplifiers for generating a plurality of relatively delayed clock signals. Buffer amplifiers couple alternate ones of the inverting amplifiers to a clock phase selection circuit for providing a desired one of said plurality of delayed clock signals. A capacitor is coupled between the output of each inverting amplifier and a point of constant potential. Respective circuits, having an input impedance which emulates the input impedance of the buffer amplifiers, are coupled to the output connections of the inverting amplifiers located between said alternate inverting amplifiers.

REFERENCES:
patent: 4489342 (1984-12-01), Gollinger et al.
patent: 4596939 (1986-06-01), Yamada
patent: 4675612 (1987-06-01), Adams et al.
patent: 4682048 (1987-07-01), Ishimoto
patent: 4713621 (1987-12-01), Nakamura et al.
patent: 4814879 (1989-03-01), McNeely
patent: 4970507 (1990-11-01), Cooperman et al.

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