Apparatus for generating internal clock signal

Details Apparatus for generating internal clock signal Apparatus for generating internal clock signal

2006-12-26

2006-12-26

Callahan, Timothy P. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S158000, C327S299000

Reexamination Certificate

active

07154312

ABSTRACT:
An apparatus for generating an internal clock signal for acquisition of accurate synchronization is provided. The apparatus including: an input buffer for buffering the external clock signal to output a first reference clock signal; a delay compensation circuit for delaying the first reference clock signal; a forward delay array; a mirror control circuit comprising a plurality of phase detectors for detecting delayed clock signals synchronized with a second reference clock signal; a backward delay array; and an output buffer to generate an internal clock signal. An internal clock signal in accurate synchronization with the reference clock signal can be generated by minimizing the delay and distortion of the reference clock signal.

REFERENCES:
patent: 5180992 (1993-01-01), Akiyama et al.
patent: 5959474 (1999-09-01), Park et al.
patent: 6111450 (2000-08-01), Powell et al.
patent: 6201432 (2001-03-01), Lim et al.
patent: 2001/0020859 (2001-09-01), Saeki
patent: 2002/0000851 (2002-01-01), Miyazaki et al.

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