Apparatus for generating high voltage signal

Details Apparatus for generating high voltage signal Apparatus for generating high voltage signal

2000-12-01

2002-03-12

Riley, Shawn (Department: 2838)

Static information storage and retrieval

Powering

C365S189090, C327S537000

Reexamination Certificate

active

06356501

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a semiconductor memory device; and, more particularly, to a high voltage generator for providing a high voltage signal for compensating a threshold voltage loss in a semiconductor memory device.
DESCRIPTION OF THE PRIOR ART
In a typical semiconductor memory device, a high voltage generator is used for compensating a voltage loss caused due to threshold voltages of metal oxide semiconductor (MOS) transistors. The high voltage generator supplies a high voltage signal that has a voltage level higher than an external power signal.
Since the high voltage signal can compensates for the threshold voltage loss, the high voltage generator are widely used in a word line drive circuit, a bit line isolation circuit, a data output buffer circuit, and the like.
FIG. 1
is a block diagram showing a conventional high voltage generator, and
FIG. 2
shows a timing chart of the conventional high generator shown in FIG.
1
.
Referring to
FIGS. 1 and 2
, a conventional high voltage generator
100
includes a level detection unit
110
, an oscillation unit
130
and a high-voltage charge pump unit
150
.
The level detection unit
110
detects a voltage level of a high voltage signal VPP to generate a high voltage enable signal PPEN when the voltage level of the high voltage signal VPP reaches a predetermined target value.
The oscillation unit
130
periodically generates an oscillation signal OSC in response to the high voltage enable signal PPEN.
The high-voltage charge pump unit
150
performs a pumping operation in response to the oscillation signal OSC to increase a voltage level of the external power signal VEXT, to thereby generate the high voltage signal VPP. Here, the high voltage signal VPP is fed back to the level detection unit
110
.
At this time, the high-voltage charge pump unit
150
is generally implemented with a plurality of cross-coupled NMOS transistors and a transfer transistor for transferring a voltage level of (VPP+VDD), where VDD is a power potential applied to the pulse generator
100
. However, a maximum gate potential of the transfer transistor reaches 3 VDD, which corresponds to about (VPP+VDD), so that a reliability related to gate oxide layers and a junction breakdown is deteriorated.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a high voltage generator including a high-voltage charge pump unit, in which reliability related to the gate oxide layers and the junction breakdown is improved by reducing the maximum gate potential of the high-voltage charge pump unit to twice the power potential (2 VDD).
In accordance with an aspect of the present invention, there is provided a high-voltage charge pump circuit for use in a semiconductor memory device, comprising: a precharge control means for precharging a first and a second nodes to a power potential in response to a first and a second clocks, respectively; a precharge means for precharging a third and a fourth nodes to the power potential in response to voltage levels of the first and second nodes, respectively; a first charge pumping means for bootstrapping the first and the second nodes to twice the power potential in response to the first and the second clocks, respectively; a second charge pumping means for bootstrapping the third and the fourth bootstrapping nodes to twice the power potential in response to a third and a fourth clocks; and a transfer means for transferring voltage level of the third and the fourth nodes to an exterior in response to voltage levels of the fourth and the third nodes, respectively.
In accordance with another aspect of the present invention, there is provided a high voltage generator for providing a high voltage signal for use in a semiconductor memory device, comprising: a level detection means for detecting a voltage level of the high voltage signal to generate a high voltage enable signal when the voltage level of the high voltage signal reaches a predetermined target value; an oscillation means, in response to the high voltage enable signal, for generating a plurality of clocks, the clocks including a first to a fourth clocks; a high-voltage charge pump means, in response to the clocks, for increasing a voltage level of an external power signal to generate the high voltage signal to a high voltage node; and a power-on precharging means, in response to a control signal, for initializing the high voltage node to a predetermined level.


REFERENCES:
patent: 5126590 (1992-06-01), Chern
patent: 6278315 (2001-08-01), Kim

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