Pulse or digital communications – Synchronizers – Synchronizing the sampling time of digital data
Patent
1995-09-29
1997-08-05
Chin, Stephen
Pulse or digital communications
Synchronizers
Synchronizing the sampling time of digital data
375375, 326 93, 327144, 377 78, H04L 700
Patent
active
056549881
ABSTRACT:
An apparatus for generating a pulse clock signal for a multiple-stage synchronizer provides a pulse clock signal to a synchronizer. The synchronizer synchronizes data received in a first clock domain, which is referenced to a first clock signal, to a second clock domain, which is referenced to a second clock signal. The apparatus includes a synchronization pulse generator and a multiplexer. The synchronization pulse generator generates a synchronization pulse based on the first clock signal and the second clock signal. The multiplexer outputs one of either the first clock signal or the synchronization pulse as the pulse clock signal based on an input control signal.
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Popescu, Val, Merle Schultz, John Spracklen, Gary Gibson, Bruce Lightner and David Isaman, "The Metaflow Architecture", IEEE Micro, Jun. 1991, pp. 10-13 and 63-73.
Batz Joseph E.
Frodsham R. Tim
Heyward Deborah J.
Karnik Milind A.
Chin Stephen
Intel Corporation
Vo Don
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