Apparatus for frequency dividing a master clock signal by a...

Details Apparatus for frequency dividing a master clock signal by a... Apparatus for frequency dividing a master clock signal by a...

2006-04-25

2006-04-25

Wells, Kenneth B. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Frequency or repetition rate conversion or control

C327S117000

Reexamination Certificate

active

07034584

ABSTRACT:
A frequency dividing circuit divides a master clock frequency by a non-integer factor to provide an output clock signal whose frequency is equal to the frequency of the master clock signal divided by that non-integer factor. In one embodiment, the circuit is operative to divide the master clock frequency by 2.5.

REFERENCES:
patent: 5371417 (1994-12-01), Mirov et al.
patent: 5528181 (1996-06-01), Suggs
patent: 6570417 (2003-05-01), Choi et al.
patent: 6707327 (2004-03-01), Choi et al.
patent: 6809567 (2004-10-01), Kim et al.
patent: 6882190 (2005-04-01), Choi et al.

Affiliated with

Also associated with

Rating

Apparatus for frequency dividing a master clock signal by a... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Apparatus for frequency dividing a master clock signal by a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus for frequency dividing a master clock signal by a... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3563771