Apparatus for forming shallow electrical junctions

Metal working – Barrier layer or semiconductor device making

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437165, 437141, 437937, 118715, C23C 1308, H01L 21223, H01L 21383

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052561623

ABSTRACT:
Very shallow electrical junctions may be formed in an oxide free surface of a semiconductor by introducing an inert or reducing gas into a vacuum processing chamber, heating the semiconductor to between 750.degree. C. and 1100.degree. C., introducing a dilute solution of a dopant gas into the chamber, and exposing the semiconductor to the gases for about 0.5 to about 100 minutes, preferably between 10 and 30 minutes. A relatively wide range of surface dopant concentrations may be achieved thereby with dopant concentration controlled independent of junction depth. Non-oxide free semiconductor surfaces may be made oxide free by first heating the semiconductor surface in the presence of the reducing gas. This technique provides uniform surface dopant concentrations and is suitable for the formation of junctions in deep trenches and other features having high aspect ratios.

REFERENCES:
patent: 4855258 (1989-08-01), Allman et al.
patent: 5124272 (1992-06-01), Saito et al.
T. Inada, et al. "Formation of Ultrashallow p+ Layers in Silicon by Thermal Diffusion of Boron and by Subsequent Rapid Thermal Annealing" Applied Physical Letters, vol. 58, No. 16, 22 Apr. 1991 (pp. 1748-1750).
Michel, et al. "Anomalous Diffusion of Boron Implanted Into Silicon Along The [100] Direction", Applied Physical Letters, vol. 53, No. 10, Sep. 5, 1988. (pp. 851-853).
Fisher, et al. "Diffusion Characteristics and Applications of Doped Silicon Dioxide Layers Deposited From Silane", RCA Review, vol. 29, Dec., 1968. (pp. 533-548).
Barry, et al. "Doped Oxides As Diffusion Sources", Solid State Science, vol. 116, No. 6, Jun., 1969. (pp. 854-860).
Scott, et al. "A Solid-To-Solid Diffusion Technique", RCA Review, Sep., 1965, (pp. 357-368).

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