Chemistry: electrical and wave energy – Apparatus – Electrolytic
Reexamination Certificate
2001-06-27
2004-11-02
Valentine, Donald R (Department: 1742)
Chemistry: electrical and wave energy
Apparatus
Electrolytic
C204S212000, C204S22400M, C204S22400M, C204S269000, C118S423000
Reexamination Certificate
active
06811658
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a method and an apparatus for forming interconnects, and a polishing liquid and a polishing method, and more particularly to a method for forming interconnects by embedding a metal such as copper (Cu) in recesses for interconnects formed in the surface of a semiconductor substrate, and to a polishing liquid and a polishing method for use in such method and apparatus.
2. Description of the Related Art
In recent years, instead of using aluminum or aluminum alloys as a material for forming interconnection circuits on a semiconductor substrate, there is an eminent movement towards using copper (Cu) which has a low electric resistance and high electro-migration resistance. Copper interconnects are generally formed by filling copper into fine recesses formed in the surface of a substrate. There are known various techniques for producing such copper interconnects, including CVD, sputtering, and plating. According to any such technique, a copper is deposited on the substantially entire surface of a substrate, followed by removal of unnecessary copper by chemical mechanical polishing (CMP).
FIGS. 32A through 32C
illustrate, in a sequence of process steps, an example of producing such a substrate W having copper interconnects. As shown in
FIG. 32A
, an insulating film
2
of an oxide SiO
2
or of a low-K material is deposited on a conductive layer la formed on a semiconductor base
1
bearing semiconductor devices. A contact hole
3
and a trench
4
for interconnects are formed in the insulating film
2
by the lithography/etching technique. Thereafter, a barrier layer
5
of TaN or the like is formed on the entire surface, and a seed layer
7
as an electric feed layer for electroplating is formed on the barrier layer
5
.
Then, as shown in
FIG. 32B
, copper plating is carried out onto the surface of the substrate W to fill the contact hole
3
and the trench
4
with copper and, at the same time, deposit a copper film on the insulating film
2
. Thereafter, the copper film
6
on the insulating film
2
is removed by chemical mechanical polishing (CMP) so as to make the surface of the copper film
6
filled in the contact hole
3
and the trench
4
for interconnects, and the surface of the insulating film
2
lie substantially on the same plane. An interconnect composed of the copper film
6
, as shown in
FIG. 32
, is thus formed.
By the way, as shown in
FIG. 33
, when the copper film
6
is formed by plating on the surface of the substrate W in which a fine hole(s)
8
with a diameter d
1
, e.g., on the order of 0.2 &mgr;m, and a large hole(s)
9
with a diameter d
2
, e.g., on the order of 100 &mgr;m are present, the growth of plating is likely to be promoted at the portion above the fine hole
8
, whereby the copper film
6
is raised at that portion, even when the effect of a plating liquid or an additive contained in the plating liquid is optimized. Further, the growth of plating with an adequately high levelling property cannot be made within the large hole
9
. This results in a difference (a+b) in the level of the copper film
6
deposited on the substrate W, i.e. the height a of the raised portion above the fine hole
8
plus the depth b of the depressed portion above the large hole
9
. Thus, in order to obtain the desired flat surface of substrate W with the fine hole
8
and the large hole
9
being fully filled with copper, it is necessary to provide the copper film
6
having a sufficiently large thickness beforehand, and remove by CMP the extra portion corresponding to the above difference (a+b) in the level.
This involves problems in that the large thickness of the plated film requires a prolonged time for processing by CMP in order to polish away the large amount. Increasing the rate of CMP processing to avoid the prolongation of processing time can cause dishing in the large hole.
In order to solve the above problems, it is required to make the thickness of the plated film as thin as possible, and prevent the formation of the raised and depressed portions in the plated film, despite the co-presence of fine and large holes in the surface of the substrate, thereby improving the flatness of the plated film. In this regard, when the plating treatment is carried out in an electrolytic copper sulfate bath, for example, it has not been possible to decrease both of the rise and the depression in the plated film merely by the action of the plating liquid or with an additive. It is possible to reduce the degree of rise in the plated film by temporarily using a reversed electric field as a power source, or by using a PR pulse power source during the film deposition process. This approach, however, cannot prevent the formation of depressed portions and, in addition, denatures the film at its surface portion.
Further, there is a strong demand for not resorting to CMP processing which, in general, needs a complicated operation and control, takes a considerably long processing time, and in addition, may be carried out, in general, in a separate apparatus from that of a plating treatment.
It is to be pointed out that though a low-K material, which has a low dielectric constant, is expected to be predominantly used in the future as a material for an insulating film, the low-K material has a low mechanical strength and therefore has difficulty enduring the stress applied during CMP processing. Thus, there is a demand for a method which enables the flattening of the substrate without giving stress thereto.
Further, a method has been reported which carries out CMP processing simultaneously with plating, viz. chemical mechanical electrolytic polishing. According to this method, the mechanical processing is carried out to promote the growing defect of plating, causing the problem of denaturing of the resulting film.
SUMMARY OF THE INVENTION
The present invention has been made in view of the above drawbacks in the prior art. It is therefore a first object of the present invention to provide a method and apparatus for forming interconnects which can obtain a plated film with improved flatness even when fine and large holes are co-present in the surface of a substrate, and which can carry out the subsequent CMP processing in a short time without suffering from dishing.
It is a second object of the present invention to provide a method and apparatus for forming interconnects which, while omitting a CMP treatment entirely or reducing a load upon a CMP treatment to the least possible extent, can successively carry out a series of copper interconnects-forming steps including a copper-filling step.
Further, it is a third object of the present invention to provide a polishing liquid which, when used in electrolytic polishing or chemical polishing, can polish a plated copper film formed on the surface of a substrate into a flatter film surface and can polish the surface of a substrate, in which copper and a conductive material other than copper are co-present, uniformly at the same polishing rate; and provide a polishing method which, due to the use of the above polishing liquid, can omit a CMP treatment entirely or can reduce the load from a CMP treatment to the least possible load.
In order to achieve the first object, the present invention provides a method for forming interconnects, comprising providing a substrate having fine recesses formed in a surface thereof plating the surface of the substrate in a plating liquid and electrolytic etching the plated film formed on the surface of the substrate in an etching liquid.
This method, when applied to a substrate having fine holes and large holes in the surface, promotes a bottom-up growth of plating in a large hole by carrying out plating in a plating liquid having a high levelling property, whereby it is possible to fill the large hole with a thinner plated film. Concomitantly with the bottom-up of plating in a large hole, the raised portion of plating above a fine hole becomes thicker. The raised portion can be selectively removed by the electrolyti
Hongo Akihisa
Kimizuka Ryoichi
Matsuda Naoki
Ohno Kanji
Ebara Corporation
Valentine Donald R
Wenderoth , Lind & Ponack, L.L.P.
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