Apparatus for forming a test stack for semiconductor wafer probi

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

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324761, 324765, G01R 3102

Patent

active

056569432

ABSTRACT:
A semiconductor wafer to be tested is placed inside a prober. A probe card (20') is placed inside a specially designed cavity (32) of a prober interface plate (24) that is pre-mounted superjacent to a head plate of the prober. The bottom surface (34) of the cavity provides solid and uniform support for the probe card. The probe card can be lifted out of the cavity whenever a probe card changeover is required. A tester interface plate (60) is pre-mounted to a test head. The tester interface plate has interlocking alignment pins (68 & 68') which are self-aligned into mating chamfered alignment holes (40 & 40') in the prober interface plate. Additionally, these two interface plates have mating interlocking features (46 & 70) for increased stability. The test stack allows the probe card to contact, typically through cantilevered pins; the active surface of the semiconductor wafer, and electrical probing or testing may then be performed on the semiconductor wafer.

REFERENCES:
patent: 3866119 (1975-02-01), Ardezzone et al.
patent: 4733172 (1988-03-01), Smolley
patent: 5172053 (1992-12-01), Itoyama
patent: 5220279 (1993-06-01), Nagasawa
patent: 5517126 (1996-05-01), Yamaguchi
patent: 5530371 (1996-06-01), Perry et al.

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